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authorViresh Kumar <viresh.kumar@linaro.org>2013-04-04 08:54:24 -0400
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-04-10 07:19:26 -0400
commit764295ae675bb252de3637e36a6602a9aed7de6b (patch)
tree6ba755e414702178ca2744aa97a3fdf0c9b39bf3 /arch/sparc
parent73cc9c8cac3f86ae4efebf001b68dcecc00b0017 (diff)
cpufreq: sparc: move cpufreq driver to drivers/cpufreq
This patch moves cpufreq driver of SPARC architecture to drivers/cpufreq. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'arch/sparc')
-rw-r--r--arch/sparc/Kconfig23
-rw-r--r--arch/sparc/kernel/Makefile3
-rw-r--r--arch/sparc/kernel/us2e_cpufreq.c408
-rw-r--r--arch/sparc/kernel/us3_cpufreq.c269
4 files changed, 0 insertions, 703 deletions
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 3d361f236308..c85b76100e3f 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -254,29 +254,6 @@ config HOTPLUG_CPU
254 254
255if SPARC64 255if SPARC64
256source "drivers/cpufreq/Kconfig" 256source "drivers/cpufreq/Kconfig"
257
258config US3_FREQ
259 tristate "UltraSPARC-III CPU Frequency driver"
260 depends on CPU_FREQ
261 select CPU_FREQ_TABLE
262 help
263 This adds the CPUFreq driver for UltraSPARC-III processors.
264
265 For details, take a look at <file:Documentation/cpu-freq>.
266
267 If in doubt, say N.
268
269config US2E_FREQ
270 tristate "UltraSPARC-IIe CPU Frequency driver"
271 depends on CPU_FREQ
272 select CPU_FREQ_TABLE
273 help
274 This adds the CPUFreq driver for UltraSPARC-IIe processors.
275
276 For details, take a look at <file:Documentation/cpu-freq>.
277
278 If in doubt, say N.
279
280endif 257endif
281 258
282config US3_MC 259config US3_MC
diff --git a/arch/sparc/kernel/Makefile b/arch/sparc/kernel/Makefile
index 6cf591b7e1c6..5276fd4e9d03 100644
--- a/arch/sparc/kernel/Makefile
+++ b/arch/sparc/kernel/Makefile
@@ -102,9 +102,6 @@ obj-$(CONFIG_PCI_MSI) += pci_msi.o
102 102
103obj-$(CONFIG_COMPAT) += sys32.o sys_sparc32.o signal32.o 103obj-$(CONFIG_COMPAT) += sys32.o sys_sparc32.o signal32.o
104 104
105# sparc64 cpufreq
106obj-$(CONFIG_US3_FREQ) += us3_cpufreq.o
107obj-$(CONFIG_US2E_FREQ) += us2e_cpufreq.o
108obj-$(CONFIG_US3_MC) += chmc.o 105obj-$(CONFIG_US3_MC) += chmc.o
109 106
110obj-$(CONFIG_KPROBES) += kprobes.o 107obj-$(CONFIG_KPROBES) += kprobes.o
diff --git a/arch/sparc/kernel/us2e_cpufreq.c b/arch/sparc/kernel/us2e_cpufreq.c
deleted file mode 100644
index 306ae462bba6..000000000000
--- a/arch/sparc/kernel/us2e_cpufreq.c
+++ /dev/null
@@ -1,408 +0,0 @@
1/* us2e_cpufreq.c: UltraSPARC-IIe cpu frequency support
2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com)
4 *
5 * Many thanks to Dominik Brodowski for fixing up the cpufreq
6 * infrastructure in order to make this driver easier to implement.
7 */
8
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <linux/sched.h>
12#include <linux/smp.h>
13#include <linux/cpufreq.h>
14#include <linux/threads.h>
15#include <linux/slab.h>
16#include <linux/delay.h>
17#include <linux/init.h>
18
19#include <asm/asi.h>
20#include <asm/timer.h>
21
22static struct cpufreq_driver *cpufreq_us2e_driver;
23
24struct us2e_freq_percpu_info {
25 struct cpufreq_frequency_table table[6];
26};
27
28/* Indexed by cpu number. */
29static struct us2e_freq_percpu_info *us2e_freq_table;
30
31#define HBIRD_MEM_CNTL0_ADDR 0x1fe0000f010UL
32#define HBIRD_ESTAR_MODE_ADDR 0x1fe0000f080UL
33
34/* UltraSPARC-IIe has five dividers: 1, 2, 4, 6, and 8. These are controlled
35 * in the ESTAR mode control register.
36 */
37#define ESTAR_MODE_DIV_1 0x0000000000000000UL
38#define ESTAR_MODE_DIV_2 0x0000000000000001UL
39#define ESTAR_MODE_DIV_4 0x0000000000000003UL
40#define ESTAR_MODE_DIV_6 0x0000000000000002UL
41#define ESTAR_MODE_DIV_8 0x0000000000000004UL
42#define ESTAR_MODE_DIV_MASK 0x0000000000000007UL
43
44#define MCTRL0_SREFRESH_ENAB 0x0000000000010000UL
45#define MCTRL0_REFR_COUNT_MASK 0x0000000000007f00UL
46#define MCTRL0_REFR_COUNT_SHIFT 8
47#define MCTRL0_REFR_INTERVAL 7800
48#define MCTRL0_REFR_CLKS_P_CNT 64
49
50static unsigned long read_hbreg(unsigned long addr)
51{
52 unsigned long ret;
53
54 __asm__ __volatile__("ldxa [%1] %2, %0"
55 : "=&r" (ret)
56 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
57 return ret;
58}
59
60static void write_hbreg(unsigned long addr, unsigned long val)
61{
62 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
63 "membar #Sync"
64 : /* no outputs */
65 : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
66 : "memory");
67 if (addr == HBIRD_ESTAR_MODE_ADDR) {
68 /* Need to wait 16 clock cycles for the PLL to lock. */
69 udelay(1);
70 }
71}
72
73static void self_refresh_ctl(int enable)
74{
75 unsigned long mctrl = read_hbreg(HBIRD_MEM_CNTL0_ADDR);
76
77 if (enable)
78 mctrl |= MCTRL0_SREFRESH_ENAB;
79 else
80 mctrl &= ~MCTRL0_SREFRESH_ENAB;
81 write_hbreg(HBIRD_MEM_CNTL0_ADDR, mctrl);
82 (void) read_hbreg(HBIRD_MEM_CNTL0_ADDR);
83}
84
85static void frob_mem_refresh(int cpu_slowing_down,
86 unsigned long clock_tick,
87 unsigned long old_divisor, unsigned long divisor)
88{
89 unsigned long old_refr_count, refr_count, mctrl;
90
91 refr_count = (clock_tick * MCTRL0_REFR_INTERVAL);
92 refr_count /= (MCTRL0_REFR_CLKS_P_CNT * divisor * 1000000000UL);
93
94 mctrl = read_hbreg(HBIRD_MEM_CNTL0_ADDR);
95 old_refr_count = (mctrl & MCTRL0_REFR_COUNT_MASK)
96 >> MCTRL0_REFR_COUNT_SHIFT;
97
98 mctrl &= ~MCTRL0_REFR_COUNT_MASK;
99 mctrl |= refr_count << MCTRL0_REFR_COUNT_SHIFT;
100 write_hbreg(HBIRD_MEM_CNTL0_ADDR, mctrl);
101 mctrl = read_hbreg(HBIRD_MEM_CNTL0_ADDR);
102
103 if (cpu_slowing_down && !(mctrl & MCTRL0_SREFRESH_ENAB)) {
104 unsigned long usecs;
105
106 /* We have to wait for both refresh counts (old
107 * and new) to go to zero.
108 */
109 usecs = (MCTRL0_REFR_CLKS_P_CNT *
110 (refr_count + old_refr_count) *
111 1000000UL *
112 old_divisor) / clock_tick;
113 udelay(usecs + 1UL);
114 }
115}
116
117static void us2e_transition(unsigned long estar, unsigned long new_bits,
118 unsigned long clock_tick,
119 unsigned long old_divisor, unsigned long divisor)
120{
121 unsigned long flags;
122
123 local_irq_save(flags);
124
125 estar &= ~ESTAR_MODE_DIV_MASK;
126
127 /* This is based upon the state transition diagram in the IIe manual. */
128 if (old_divisor == 2 && divisor == 1) {
129 self_refresh_ctl(0);
130 write_hbreg(HBIRD_ESTAR_MODE_ADDR, estar | new_bits);
131 frob_mem_refresh(0, clock_tick, old_divisor, divisor);
132 } else if (old_divisor == 1 && divisor == 2) {
133 frob_mem_refresh(1, clock_tick, old_divisor, divisor);
134 write_hbreg(HBIRD_ESTAR_MODE_ADDR, estar | new_bits);
135 self_refresh_ctl(1);
136 } else if (old_divisor == 1 && divisor > 2) {
137 us2e_transition(estar, ESTAR_MODE_DIV_2, clock_tick,
138 1, 2);
139 us2e_transition(estar, new_bits, clock_tick,
140 2, divisor);
141 } else if (old_divisor > 2 && divisor == 1) {
142 us2e_transition(estar, ESTAR_MODE_DIV_2, clock_tick,
143 old_divisor, 2);
144 us2e_transition(estar, new_bits, clock_tick,
145 2, divisor);
146 } else if (old_divisor < divisor) {
147 frob_mem_refresh(0, clock_tick, old_divisor, divisor);
148 write_hbreg(HBIRD_ESTAR_MODE_ADDR, estar | new_bits);
149 } else if (old_divisor > divisor) {
150 write_hbreg(HBIRD_ESTAR_MODE_ADDR, estar | new_bits);
151 frob_mem_refresh(1, clock_tick, old_divisor, divisor);
152 } else {
153 BUG();
154 }
155
156 local_irq_restore(flags);
157}
158
159static unsigned long index_to_estar_mode(unsigned int index)
160{
161 switch (index) {
162 case 0:
163 return ESTAR_MODE_DIV_1;
164
165 case 1:
166 return ESTAR_MODE_DIV_2;
167
168 case 2:
169 return ESTAR_MODE_DIV_4;
170
171 case 3:
172 return ESTAR_MODE_DIV_6;
173
174 case 4:
175 return ESTAR_MODE_DIV_8;
176
177 default:
178 BUG();
179 }
180}
181
182static unsigned long index_to_divisor(unsigned int index)
183{
184 switch (index) {
185 case 0:
186 return 1;
187
188 case 1:
189 return 2;
190
191 case 2:
192 return 4;
193
194 case 3:
195 return 6;
196
197 case 4:
198 return 8;
199
200 default:
201 BUG();
202 }
203}
204
205static unsigned long estar_to_divisor(unsigned long estar)
206{
207 unsigned long ret;
208
209 switch (estar & ESTAR_MODE_DIV_MASK) {
210 case ESTAR_MODE_DIV_1:
211 ret = 1;
212 break;
213 case ESTAR_MODE_DIV_2:
214 ret = 2;
215 break;
216 case ESTAR_MODE_DIV_4:
217 ret = 4;
218 break;
219 case ESTAR_MODE_DIV_6:
220 ret = 6;
221 break;
222 case ESTAR_MODE_DIV_8:
223 ret = 8;
224 break;
225 default:
226 BUG();
227 }
228
229 return ret;
230}
231
232static unsigned int us2e_freq_get(unsigned int cpu)
233{
234 cpumask_t cpus_allowed;
235 unsigned long clock_tick, estar;
236
237 cpumask_copy(&cpus_allowed, tsk_cpus_allowed(current));
238 set_cpus_allowed_ptr(current, cpumask_of(cpu));
239
240 clock_tick = sparc64_get_clock_tick(cpu) / 1000;
241 estar = read_hbreg(HBIRD_ESTAR_MODE_ADDR);
242
243 set_cpus_allowed_ptr(current, &cpus_allowed);
244
245 return clock_tick / estar_to_divisor(estar);
246}
247
248static void us2e_set_cpu_divider_index(struct cpufreq_policy *policy,
249 unsigned int index)
250{
251 unsigned int cpu = policy->cpu;
252 unsigned long new_bits, new_freq;
253 unsigned long clock_tick, divisor, old_divisor, estar;
254 cpumask_t cpus_allowed;
255 struct cpufreq_freqs freqs;
256
257 cpumask_copy(&cpus_allowed, tsk_cpus_allowed(current));
258 set_cpus_allowed_ptr(current, cpumask_of(cpu));
259
260 new_freq = clock_tick = sparc64_get_clock_tick(cpu) / 1000;
261 new_bits = index_to_estar_mode(index);
262 divisor = index_to_divisor(index);
263 new_freq /= divisor;
264
265 estar = read_hbreg(HBIRD_ESTAR_MODE_ADDR);
266
267 old_divisor = estar_to_divisor(estar);
268
269 freqs.old = clock_tick / old_divisor;
270 freqs.new = new_freq;
271 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
272
273 if (old_divisor != divisor)
274 us2e_transition(estar, new_bits, clock_tick * 1000,
275 old_divisor, divisor);
276
277 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
278
279 set_cpus_allowed_ptr(current, &cpus_allowed);
280}
281
282static int us2e_freq_target(struct cpufreq_policy *policy,
283 unsigned int target_freq,
284 unsigned int relation)
285{
286 unsigned int new_index = 0;
287
288 if (cpufreq_frequency_table_target(policy,
289 &us2e_freq_table[policy->cpu].table[0],
290 target_freq, relation, &new_index))
291 return -EINVAL;
292
293 us2e_set_cpu_divider_index(policy, new_index);
294
295 return 0;
296}
297
298static int us2e_freq_verify(struct cpufreq_policy *policy)
299{
300 return cpufreq_frequency_table_verify(policy,
301 &us2e_freq_table[policy->cpu].table[0]);
302}
303
304static int __init us2e_freq_cpu_init(struct cpufreq_policy *policy)
305{
306 unsigned int cpu = policy->cpu;
307 unsigned long clock_tick = sparc64_get_clock_tick(cpu) / 1000;
308 struct cpufreq_frequency_table *table =
309 &us2e_freq_table[cpu].table[0];
310
311 table[0].index = 0;
312 table[0].frequency = clock_tick / 1;
313 table[1].index = 1;
314 table[1].frequency = clock_tick / 2;
315 table[2].index = 2;
316 table[2].frequency = clock_tick / 4;
317 table[2].index = 3;
318 table[2].frequency = clock_tick / 6;
319 table[2].index = 4;
320 table[2].frequency = clock_tick / 8;
321 table[2].index = 5;
322 table[3].frequency = CPUFREQ_TABLE_END;
323
324 policy->cpuinfo.transition_latency = 0;
325 policy->cur = clock_tick;
326
327 return cpufreq_frequency_table_cpuinfo(policy, table);
328}
329
330static int us2e_freq_cpu_exit(struct cpufreq_policy *policy)
331{
332 if (cpufreq_us2e_driver)
333 us2e_set_cpu_divider_index(policy, 0);
334
335 return 0;
336}
337
338static int __init us2e_freq_init(void)
339{
340 unsigned long manuf, impl, ver;
341 int ret;
342
343 if (tlb_type != spitfire)
344 return -ENODEV;
345
346 __asm__("rdpr %%ver, %0" : "=r" (ver));
347 manuf = ((ver >> 48) & 0xffff);
348 impl = ((ver >> 32) & 0xffff);
349
350 if (manuf == 0x17 && impl == 0x13) {
351 struct cpufreq_driver *driver;
352
353 ret = -ENOMEM;
354 driver = kzalloc(sizeof(struct cpufreq_driver), GFP_KERNEL);
355 if (!driver)
356 goto err_out;
357
358 us2e_freq_table = kzalloc(
359 (NR_CPUS * sizeof(struct us2e_freq_percpu_info)),
360 GFP_KERNEL);
361 if (!us2e_freq_table)
362 goto err_out;
363
364 driver->init = us2e_freq_cpu_init;
365 driver->verify = us2e_freq_verify;
366 driver->target = us2e_freq_target;
367 driver->get = us2e_freq_get;
368 driver->exit = us2e_freq_cpu_exit;
369 driver->owner = THIS_MODULE,
370 strcpy(driver->name, "UltraSPARC-IIe");
371
372 cpufreq_us2e_driver = driver;
373 ret = cpufreq_register_driver(driver);
374 if (ret)
375 goto err_out;
376
377 return 0;
378
379err_out:
380 if (driver) {
381 kfree(driver);
382 cpufreq_us2e_driver = NULL;
383 }
384 kfree(us2e_freq_table);
385 us2e_freq_table = NULL;
386 return ret;
387 }
388
389 return -ENODEV;
390}
391
392static void __exit us2e_freq_exit(void)
393{
394 if (cpufreq_us2e_driver) {
395 cpufreq_unregister_driver(cpufreq_us2e_driver);
396 kfree(cpufreq_us2e_driver);
397 cpufreq_us2e_driver = NULL;
398 kfree(us2e_freq_table);
399 us2e_freq_table = NULL;
400 }
401}
402
403MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
404MODULE_DESCRIPTION("cpufreq driver for UltraSPARC-IIe");
405MODULE_LICENSE("GPL");
406
407module_init(us2e_freq_init);
408module_exit(us2e_freq_exit);
diff --git a/arch/sparc/kernel/us3_cpufreq.c b/arch/sparc/kernel/us3_cpufreq.c
deleted file mode 100644
index c71ee142347a..000000000000
--- a/arch/sparc/kernel/us3_cpufreq.c
+++ /dev/null
@@ -1,269 +0,0 @@
1/* us3_cpufreq.c: UltraSPARC-III cpu frequency support
2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com)
4 *
5 * Many thanks to Dominik Brodowski for fixing up the cpufreq
6 * infrastructure in order to make this driver easier to implement.
7 */
8
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <linux/sched.h>
12#include <linux/smp.h>
13#include <linux/cpufreq.h>
14#include <linux/threads.h>
15#include <linux/slab.h>
16#include <linux/init.h>
17
18#include <asm/head.h>
19#include <asm/timer.h>
20
21static struct cpufreq_driver *cpufreq_us3_driver;
22
23struct us3_freq_percpu_info {
24 struct cpufreq_frequency_table table[4];
25};
26
27/* Indexed by cpu number. */
28static struct us3_freq_percpu_info *us3_freq_table;
29
30/* UltraSPARC-III has three dividers: 1, 2, and 32. These are controlled
31 * in the Safari config register.
32 */
33#define SAFARI_CFG_DIV_1 0x0000000000000000UL
34#define SAFARI_CFG_DIV_2 0x0000000040000000UL
35#define SAFARI_CFG_DIV_32 0x0000000080000000UL
36#define SAFARI_CFG_DIV_MASK 0x00000000C0000000UL
37
38static unsigned long read_safari_cfg(void)
39{
40 unsigned long ret;
41
42 __asm__ __volatile__("ldxa [%%g0] %1, %0"
43 : "=&r" (ret)
44 : "i" (ASI_SAFARI_CONFIG));
45 return ret;
46}
47
48static void write_safari_cfg(unsigned long val)
49{
50 __asm__ __volatile__("stxa %0, [%%g0] %1\n\t"
51 "membar #Sync"
52 : /* no outputs */
53 : "r" (val), "i" (ASI_SAFARI_CONFIG)
54 : "memory");
55}
56
57static unsigned long get_current_freq(unsigned int cpu, unsigned long safari_cfg)
58{
59 unsigned long clock_tick = sparc64_get_clock_tick(cpu) / 1000;
60 unsigned long ret;
61
62 switch (safari_cfg & SAFARI_CFG_DIV_MASK) {
63 case SAFARI_CFG_DIV_1:
64 ret = clock_tick / 1;
65 break;
66 case SAFARI_CFG_DIV_2:
67 ret = clock_tick / 2;
68 break;
69 case SAFARI_CFG_DIV_32:
70 ret = clock_tick / 32;
71 break;
72 default:
73 BUG();
74 }
75
76 return ret;
77}
78
79static unsigned int us3_freq_get(unsigned int cpu)
80{
81 cpumask_t cpus_allowed;
82 unsigned long reg;
83 unsigned int ret;
84
85 cpumask_copy(&cpus_allowed, tsk_cpus_allowed(current));
86 set_cpus_allowed_ptr(current, cpumask_of(cpu));
87
88 reg = read_safari_cfg();
89 ret = get_current_freq(cpu, reg);
90
91 set_cpus_allowed_ptr(current, &cpus_allowed);
92
93 return ret;
94}
95
96static void us3_set_cpu_divider_index(struct cpufreq_policy *policy,
97 unsigned int index)
98{
99 unsigned int cpu = policy->cpu;
100 unsigned long new_bits, new_freq, reg;
101 cpumask_t cpus_allowed;
102 struct cpufreq_freqs freqs;
103
104 cpumask_copy(&cpus_allowed, tsk_cpus_allowed(current));
105 set_cpus_allowed_ptr(current, cpumask_of(cpu));
106
107 new_freq = sparc64_get_clock_tick(cpu) / 1000;
108 switch (index) {
109 case 0:
110 new_bits = SAFARI_CFG_DIV_1;
111 new_freq /= 1;
112 break;
113 case 1:
114 new_bits = SAFARI_CFG_DIV_2;
115 new_freq /= 2;
116 break;
117 case 2:
118 new_bits = SAFARI_CFG_DIV_32;
119 new_freq /= 32;
120 break;
121
122 default:
123 BUG();
124 }
125
126 reg = read_safari_cfg();
127
128 freqs.old = get_current_freq(cpu, reg);
129 freqs.new = new_freq;
130 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
131
132 reg &= ~SAFARI_CFG_DIV_MASK;
133 reg |= new_bits;
134 write_safari_cfg(reg);
135
136 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
137
138 set_cpus_allowed_ptr(current, &cpus_allowed);
139}
140
141static int us3_freq_target(struct cpufreq_policy *policy,
142 unsigned int target_freq,
143 unsigned int relation)
144{
145 unsigned int new_index = 0;
146
147 if (cpufreq_frequency_table_target(policy,
148 &us3_freq_table[policy->cpu].table[0],
149 target_freq,
150 relation,
151 &new_index))
152 return -EINVAL;
153
154 us3_set_cpu_divider_index(policy, new_index);
155
156 return 0;
157}
158
159static int us3_freq_verify(struct cpufreq_policy *policy)
160{
161 return cpufreq_frequency_table_verify(policy,
162 &us3_freq_table[policy->cpu].table[0]);
163}
164
165static int __init us3_freq_cpu_init(struct cpufreq_policy *policy)
166{
167 unsigned int cpu = policy->cpu;
168 unsigned long clock_tick = sparc64_get_clock_tick(cpu) / 1000;
169 struct cpufreq_frequency_table *table =
170 &us3_freq_table[cpu].table[0];
171
172 table[0].index = 0;
173 table[0].frequency = clock_tick / 1;
174 table[1].index = 1;
175 table[1].frequency = clock_tick / 2;
176 table[2].index = 2;
177 table[2].frequency = clock_tick / 32;
178 table[3].index = 0;
179 table[3].frequency = CPUFREQ_TABLE_END;
180
181 policy->cpuinfo.transition_latency = 0;
182 policy->cur = clock_tick;
183
184 return cpufreq_frequency_table_cpuinfo(policy, table);
185}
186
187static int us3_freq_cpu_exit(struct cpufreq_policy *policy)
188{
189 if (cpufreq_us3_driver)
190 us3_set_cpu_divider_index(policy, 0);
191
192 return 0;
193}
194
195static int __init us3_freq_init(void)
196{
197 unsigned long manuf, impl, ver;
198 int ret;
199
200 if (tlb_type != cheetah && tlb_type != cheetah_plus)
201 return -ENODEV;
202
203 __asm__("rdpr %%ver, %0" : "=r" (ver));
204 manuf = ((ver >> 48) & 0xffff);
205 impl = ((ver >> 32) & 0xffff);
206
207 if (manuf == CHEETAH_MANUF &&
208 (impl == CHEETAH_IMPL ||
209 impl == CHEETAH_PLUS_IMPL ||
210 impl == JAGUAR_IMPL ||
211 impl == PANTHER_IMPL)) {
212 struct cpufreq_driver *driver;
213
214 ret = -ENOMEM;
215 driver = kzalloc(sizeof(struct cpufreq_driver), GFP_KERNEL);
216 if (!driver)
217 goto err_out;
218
219 us3_freq_table = kzalloc(
220 (NR_CPUS * sizeof(struct us3_freq_percpu_info)),
221 GFP_KERNEL);
222 if (!us3_freq_table)
223 goto err_out;
224
225 driver->init = us3_freq_cpu_init;
226 driver->verify = us3_freq_verify;
227 driver->target = us3_freq_target;
228 driver->get = us3_freq_get;
229 driver->exit = us3_freq_cpu_exit;
230 driver->owner = THIS_MODULE,
231 strcpy(driver->name, "UltraSPARC-III");
232
233 cpufreq_us3_driver = driver;
234 ret = cpufreq_register_driver(driver);
235 if (ret)
236 goto err_out;
237
238 return 0;
239
240err_out:
241 if (driver) {
242 kfree(driver);
243 cpufreq_us3_driver = NULL;
244 }
245 kfree(us3_freq_table);
246 us3_freq_table = NULL;
247 return ret;
248 }
249
250 return -ENODEV;
251}
252
253static void __exit us3_freq_exit(void)
254{
255 if (cpufreq_us3_driver) {
256 cpufreq_unregister_driver(cpufreq_us3_driver);
257 kfree(cpufreq_us3_driver);
258 cpufreq_us3_driver = NULL;
259 kfree(us3_freq_table);
260 us3_freq_table = NULL;
261 }
262}
263
264MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
265MODULE_DESCRIPTION("cpufreq driver for UltraSPARC-III");
266MODULE_LICENSE("GPL");
267
268module_init(us3_freq_init);
269module_exit(us3_freq_exit);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-03 15:06:17 -0500