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authorSam Ravnborg <sam@ravnborg.org>2011-12-30 07:32:16 -0500
committerDavid S. Miller <davem@davemloft.net>2011-12-30 13:29:18 -0500
commit6e4d177dc07b1c4d8e6ef061fe5ffcc7e7646546 (patch)
tree765291075b2b334df16cf120fbc37259a2bcd342 /arch/sparc
parenta4b4f4371b94552973109f6b9ebe6af7a9efa0bd (diff)
sparc32: remove unused file: include/asm/pgtsun4.h
sun4 is no longer supported and this file is unused. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc')
-rw-r--r--arch/sparc/include/asm/pgtsun4.h171
1 files changed, 0 insertions, 171 deletions
diff --git a/arch/sparc/include/asm/pgtsun4.h b/arch/sparc/include/asm/pgtsun4.h
deleted file mode 100644
index 5a0d661fb82e..000000000000
--- a/arch/sparc/include/asm/pgtsun4.h
+++ /dev/null
@@ -1,171 +0,0 @@
1/*
2 * pgtsun4.h: Sun4 specific pgtable.h defines and code.
3 *
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 */
7#ifndef _SPARC_PGTSUN4C_H
8#define _SPARC_PGTSUN4C_H
9
10#include <asm/contregs.h>
11
12/* PMD_SHIFT determines the size of the area a second-level page table can map */
13#define SUN4C_PMD_SHIFT 23
14
15/* PGDIR_SHIFT determines what a third-level page table entry can map */
16#define SUN4C_PGDIR_SHIFT 23
17#define SUN4C_PGDIR_SIZE (1UL << SUN4C_PGDIR_SHIFT)
18#define SUN4C_PGDIR_MASK (~(SUN4C_PGDIR_SIZE-1))
19#define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&SUN4C_PGDIR_MASK)
20
21/* To represent how the sun4c mmu really lays things out. */
22#define SUN4C_REAL_PGDIR_SHIFT 18
23#define SUN4C_REAL_PGDIR_SIZE (1UL << SUN4C_REAL_PGDIR_SHIFT)
24#define SUN4C_REAL_PGDIR_MASK (~(SUN4C_REAL_PGDIR_SIZE-1))
25#define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&SUN4C_REAL_PGDIR_MASK)
26
27/* 19 bit PFN on sun4 */
28#define SUN4C_PFN_MASK 0x7ffff
29
30/* Don't increase these unless the structures in sun4c.c are fixed */
31#define SUN4C_MAX_SEGMAPS 256
32#define SUN4C_MAX_CONTEXTS 16
33
34/*
35 * To be efficient, and not have to worry about allocating such
36 * a huge pgd, we make the kernel sun4c tables each hold 1024
37 * entries and the pgd similarly just like the i386 tables.
38 */
39#define SUN4C_PTRS_PER_PTE 1024
40#define SUN4C_PTRS_PER_PMD 1
41#define SUN4C_PTRS_PER_PGD 1024
42
43/*
44 * Sparc SUN4C pte fields.
45 */
46#define _SUN4C_PAGE_VALID 0x80000000
47#define _SUN4C_PAGE_SILENT_READ 0x80000000 /* synonym */
48#define _SUN4C_PAGE_DIRTY 0x40000000
49#define _SUN4C_PAGE_SILENT_WRITE 0x40000000 /* synonym */
50#define _SUN4C_PAGE_PRIV 0x20000000 /* privileged page */
51#define _SUN4C_PAGE_NOCACHE 0x10000000 /* non-cacheable page */
52#define _SUN4C_PAGE_PRESENT 0x08000000 /* implemented in software */
53#define _SUN4C_PAGE_IO 0x04000000 /* I/O page */
54#define _SUN4C_PAGE_FILE 0x02000000 /* implemented in software */
55#define _SUN4C_PAGE_READ 0x00800000 /* implemented in software */
56#define _SUN4C_PAGE_WRITE 0x00400000 /* implemented in software */
57#define _SUN4C_PAGE_ACCESSED 0x00200000 /* implemented in software */
58#define _SUN4C_PAGE_MODIFIED 0x00100000 /* implemented in software */
59
60#define _SUN4C_READABLE (_SUN4C_PAGE_READ|_SUN4C_PAGE_SILENT_READ|\
61 _SUN4C_PAGE_ACCESSED)
62#define _SUN4C_WRITEABLE (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE|\
63 _SUN4C_PAGE_MODIFIED)
64
65#define _SUN4C_PAGE_CHG_MASK (0xffff|_SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_MODIFIED)
66
67#define SUN4C_PAGE_NONE __pgprot(_SUN4C_PAGE_PRESENT)
68#define SUN4C_PAGE_SHARED __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE|\
69 _SUN4C_PAGE_WRITE)
70#define SUN4C_PAGE_COPY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE)
71#define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE)
72#define SUN4C_PAGE_KERNEL __pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\
73 _SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV)
74
75/* SUN4C swap entry encoding
76 *
77 * We use 5 bits for the type and 19 for the offset. This gives us
78 * 32 swapfiles of 4GB each. Encoding looks like:
79 *
80 * RRRRRRRRooooooooooooooooooottttt
81 * fedcba9876543210fedcba9876543210
82 *
83 * The top 8 bits are reserved for protection and status bits, especially
84 * FILE and PRESENT.
85 */
86#define SUN4C_SWP_TYPE_MASK 0x1f
87#define SUN4C_SWP_OFF_MASK 0x7ffff
88#define SUN4C_SWP_OFF_SHIFT 5
89
90#ifndef __ASSEMBLY__
91
92static inline unsigned long sun4c_get_synchronous_error(void)
93{
94 unsigned long sync_err;
95
96 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
97 "=r" (sync_err) :
98 "r" (AC_SYNC_ERR), "i" (ASI_CONTROL));
99 return sync_err;
100}
101
102static inline unsigned long sun4c_get_synchronous_address(void)
103{
104 unsigned long sync_addr;
105
106 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
107 "=r" (sync_addr) :
108 "r" (AC_SYNC_VA), "i" (ASI_CONTROL));
109 return sync_addr;
110}
111
112/* SUN4 pte, segmap, and context manipulation */
113static inline unsigned long sun4c_get_segmap(unsigned long addr)
114{
115 register unsigned long entry;
116
117 __asm__ __volatile__("\n\tlduha [%1] %2, %0\n\t" :
118 "=r" (entry) :
119 "r" (addr), "i" (ASI_SEGMAP));
120 return entry;
121}
122
123static inline void sun4c_put_segmap(unsigned long addr, unsigned long entry)
124{
125 __asm__ __volatile__("\n\tstha %1, [%0] %2; nop; nop; nop;\n\t" : :
126 "r" (addr), "r" (entry),
127 "i" (ASI_SEGMAP)
128 : "memory");
129}
130
131static inline unsigned long sun4c_get_pte(unsigned long addr)
132{
133 register unsigned long entry;
134
135 __asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" :
136 "=r" (entry) :
137 "r" (addr), "i" (ASI_PTE));
138 return entry;
139}
140
141static inline void sun4c_put_pte(unsigned long addr, unsigned long entry)
142{
143 __asm__ __volatile__("\n\tsta %1, [%0] %2; nop; nop; nop;\n\t" : :
144 "r" (addr),
145 "r" ((entry & ~(_SUN4C_PAGE_PRESENT))), "i" (ASI_PTE)
146 : "memory");
147}
148
149static inline int sun4c_get_context(void)
150{
151 register int ctx;
152
153 __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" :
154 "=r" (ctx) :
155 "r" (AC_CONTEXT), "i" (ASI_CONTROL));
156
157 return ctx;
158}
159
160static inline int sun4c_set_context(int ctx)
161{
162 __asm__ __volatile__("\n\tstba %0, [%1] %2; nop; nop; nop;\n\t" : :
163 "r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL)
164 : "memory");
165
166 return ctx;
167}
168
169#endif /* !(__ASSEMBLY__) */
170
171#endif /* !(_SPARC_PGTSUN4_H) */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 09:13:43 -0500