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authorDavid S. Miller <davem@sunset.davemloft.net>2007-10-11 18:41:01 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-14 00:53:14 -0400
commitbbe0b5eb578155e4e716c8cf5b23ba67bab338e2 (patch)
treeef3fcc5d2a6e1fe5c2c67a13149cb451287677a7 /arch/sparc64
parent759f89e03c9e5656ff18c02e21b439506f7c0cdc (diff)
[SPARC64]: Kill pci_memspace_mask.
It is totally unnecessary as the needed information is properly encoded in the resources. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64')
-rw-r--r--arch/sparc64/kernel/pci.c60
-rw-r--r--arch/sparc64/kernel/pci_fire.c7
-rw-r--r--arch/sparc64/kernel/pci_impl.h1
-rw-r--r--arch/sparc64/kernel/pci_psycho.c6
-rw-r--r--arch/sparc64/kernel/pci_schizo.c3
-rw-r--r--arch/sparc64/kernel/pci_sun4v.c5
6 files changed, 30 insertions, 52 deletions
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index e8dac81d8a0d..9b808640a193 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -29,8 +29,6 @@
29 29
30#include "pci_impl.h" 30#include "pci_impl.h"
31 31
32unsigned long pci_memspace_mask = 0xffffffffUL;
33
34#ifndef CONFIG_PCI 32#ifndef CONFIG_PCI
35/* A "nop" PCI implementation. */ 33/* A "nop" PCI implementation. */
36asmlinkage int sys_pciconfig_read(unsigned long bus, unsigned long dfn, 34asmlinkage int sys_pciconfig_read(unsigned long bus, unsigned long dfn,
@@ -1066,8 +1064,8 @@ static int __pci_mmap_make_offset_bus(struct pci_dev *pdev, struct vm_area_struc
1066 return 0; 1064 return 0;
1067} 1065}
1068 1066
1069/* Adjust vm_pgoff of VMA such that it is the physical page offset corresponding 1067/* Adjust vm_pgoff of VMA such that it is the physical page offset
1070 * to the 32-bit pci bus offset for DEV requested by the user. 1068 * corresponding to the 32-bit pci bus offset for DEV requested by the user.
1071 * 1069 *
1072 * Basically, the user finds the base address for his device which he wishes 1070 * Basically, the user finds the base address for his device which he wishes
1073 * to mmap. They read the 32-bit value from the config space base register, 1071 * to mmap. They read the 32-bit value from the config space base register,
@@ -1076,21 +1074,35 @@ static int __pci_mmap_make_offset_bus(struct pci_dev *pdev, struct vm_area_struc
1076 * 1074 *
1077 * Returns negative error code on failure, zero on success. 1075 * Returns negative error code on failure, zero on success.
1078 */ 1076 */
1079static int __pci_mmap_make_offset(struct pci_dev *dev, struct vm_area_struct *vma, 1077static int __pci_mmap_make_offset(struct pci_dev *pdev,
1078 struct vm_area_struct *vma,
1080 enum pci_mmap_state mmap_state) 1079 enum pci_mmap_state mmap_state)
1081{ 1080{
1082 unsigned long user_offset = vma->vm_pgoff << PAGE_SHIFT; 1081 unsigned long user_paddr, user_size;
1083 unsigned long user32 = user_offset & pci_memspace_mask; 1082 int i, err;
1084 unsigned long largest_base, this_base, addr32;
1085 int i;
1086 1083
1087 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_HOST) 1084 /* First compute the physical address in vma->vm_pgoff,
1088 return __pci_mmap_make_offset_bus(dev, vma, mmap_state); 1085 * making sure the user offset is within range in the
1086 * appropriate PCI space.
1087 */
1088 err = __pci_mmap_make_offset_bus(pdev, vma, mmap_state);
1089 if (err)
1090 return err;
1091
1092 /* If this is a mapping on a host bridge, any address
1093 * is OK.
1094 */
1095 if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_HOST)
1096 return err;
1097
1098 /* Otherwise make sure it's in the range for one of the
1099 * device's resources.
1100 */
1101 user_paddr = vma->vm_pgoff << PAGE_SHIFT;
1102 user_size = vma->vm_end - vma->vm_start;
1089 1103
1090 /* Figure out which base address this is for. */
1091 largest_base = 0UL;
1092 for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 1104 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
1093 struct resource *rp = &dev->resource[i]; 1105 struct resource *rp = &pdev->resource[i];
1094 1106
1095 /* Active? */ 1107 /* Active? */
1096 if (!rp->flags) 1108 if (!rp->flags)
@@ -1108,26 +1120,14 @@ static int __pci_mmap_make_offset(struct pci_dev *dev, struct vm_area_struct *vm
1108 continue; 1120 continue;
1109 } 1121 }
1110 1122
1111 this_base = rp->start; 1123 if ((rp->start <= user_paddr) &&
1112 1124 (user_paddr + user_size) <= (rp->end + 1UL))
1113 addr32 = (this_base & PAGE_MASK) & pci_memspace_mask; 1125 break;
1114
1115 if (mmap_state == pci_mmap_io)
1116 addr32 &= 0xffffff;
1117
1118 if (addr32 <= user32 && this_base > largest_base)
1119 largest_base = this_base;
1120 } 1126 }
1121 1127
1122 if (largest_base == 0UL) 1128 if (i > PCI_ROM_RESOURCE)
1123 return -EINVAL; 1129 return -EINVAL;
1124 1130
1125 /* Now construct the final physical address. */
1126 if (mmap_state == pci_mmap_io)
1127 vma->vm_pgoff = (((largest_base & ~0xffffffUL) | user32) >> PAGE_SHIFT);
1128 else
1129 vma->vm_pgoff = (((largest_base & ~(pci_memspace_mask)) | user32) >> PAGE_SHIFT);
1130
1131 return 0; 1131 return 0;
1132} 1132}
1133 1133
diff --git a/arch/sparc64/kernel/pci_fire.c b/arch/sparc64/kernel/pci_fire.c
index bcf6a5d425ab..fef3b37487bf 100644
--- a/arch/sparc64/kernel/pci_fire.c
+++ b/arch/sparc64/kernel/pci_fire.c
@@ -519,13 +519,6 @@ void fire_pci_init(struct device_node *dp, const char *model_name)
519 519
520 p->pbm_B.iommu = iommu; 520 p->pbm_B.iommu = iommu;
521 521
522 /* XXX MSI support XXX */
523
524 /* Like PSYCHO and SCHIZO we have a 2GB aligned area
525 * for memory space.
526 */
527 pci_memspace_mask = 0x7fffffffUL;
528
529 if (pci_fire_pbm_init(p, dp, portid)) 522 if (pci_fire_pbm_init(p, dp, portid))
530 goto fatal_memory_error; 523 goto fatal_memory_error;
531 524
diff --git a/arch/sparc64/kernel/pci_impl.h b/arch/sparc64/kernel/pci_impl.h
index ccbb188f2e61..4a50da13ce48 100644
--- a/arch/sparc64/kernel/pci_impl.h
+++ b/arch/sparc64/kernel/pci_impl.h
@@ -157,7 +157,6 @@ struct pci_controller_info {
157}; 157};
158 158
159extern struct pci_pbm_info *pci_pbm_root; 159extern struct pci_pbm_info *pci_pbm_root;
160extern unsigned long pci_memspace_mask;
161 160
162extern int pci_num_pbms; 161extern int pci_num_pbms;
163 162
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c
index b6b4cfea5b5f..d27ee5d528a2 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc64/kernel/pci_psycho.c
@@ -1058,12 +1058,6 @@ void psycho_init(struct device_node *dp, char *model_name)
1058 p->pbm_A.config_space = p->pbm_B.config_space = 1058 p->pbm_A.config_space = p->pbm_B.config_space =
1059 (pr_regs[2].phys_addr + PSYCHO_CONFIGSPACE); 1059 (pr_regs[2].phys_addr + PSYCHO_CONFIGSPACE);
1060 1060
1061 /*
1062 * Psycho's PCI MEM space is mapped to a 2GB aligned area, so
1063 * we need to adjust our MEM space mask.
1064 */
1065 pci_memspace_mask = 0x7fffffffUL;
1066
1067 psycho_controller_hwinit(&p->pbm_A); 1061 psycho_controller_hwinit(&p->pbm_A);
1068 1062
1069 if (psycho_iommu_init(&p->pbm_A)) 1063 if (psycho_iommu_init(&p->pbm_A))
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index 3c30bfa1f3a3..9546ba9f5dee 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -1464,9 +1464,6 @@ static void __schizo_init(struct device_node *dp, char *model_name, int chip_typ
1464 1464
1465 p->pbm_B.iommu = iommu; 1465 p->pbm_B.iommu = iommu;
1466 1466
1467 /* Like PSYCHO we have a 2GB aligned area for memory space. */
1468 pci_memspace_mask = 0x7fffffffUL;
1469
1470 if (schizo_pbm_init(p, dp, portid, chip_type)) 1467 if (schizo_pbm_init(p, dp, portid, chip_type))
1471 goto fatal_memory_error; 1468 goto fatal_memory_error;
1472 1469
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c
index 97c45b26b780..95de1444ee67 100644
--- a/arch/sparc64/kernel/pci_sun4v.c
+++ b/arch/sparc64/kernel/pci_sun4v.c
@@ -1055,11 +1055,6 @@ void __init sun4v_pci_init(struct device_node *dp, char *model_name)
1055 1055
1056 p->pbm_B.iommu = iommu; 1056 p->pbm_B.iommu = iommu;
1057 1057
1058 /* Like PSYCHO and SCHIZO we have a 2GB aligned area
1059 * for memory space.
1060 */
1061 pci_memspace_mask = 0x7fffffffUL;
1062
1063 pci_sun4v_pbm_init(p, dp, devhandle); 1058 pci_sun4v_pbm_init(p, dp, devhandle);
1064 return; 1059 return;
1065 1060