diff options
author | David S. Miller <davem@davemloft.net> | 2005-07-05 22:45:24 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2005-07-05 22:45:24 -0400 |
commit | fef43da4e4341697a682f5aae1d5d428e840bc61 (patch) | |
tree | f7ba677e7aa1824bfc6e6fa434e42cd62207d653 /arch/sparc64 | |
parent | d06e7a56d91328267a96b1a4df4ede7529f829e8 (diff) |
[SPARC64]: Fix UltraSPARC-III fallout from membar changes.
The membar changes made the size of __cheetah_flush_tlb_pending
grow by one instruction, but the boot-time code patching was
not updated to match.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64')
-rw-r--r-- | arch/sparc64/mm/ultra.S | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/sparc64/mm/ultra.S b/arch/sparc64/mm/ultra.S index 7a2431d3abc7..363770893797 100644 --- a/arch/sparc64/mm/ultra.S +++ b/arch/sparc64/mm/ultra.S | |||
@@ -72,6 +72,7 @@ __flush_tlb_pending: | |||
72 | flush %g6 | 72 | flush %g6 |
73 | retl | 73 | retl |
74 | wrpr %g7, 0x0, %pstate | 74 | wrpr %g7, 0x0, %pstate |
75 | nop | ||
75 | 76 | ||
76 | .align 32 | 77 | .align 32 |
77 | .globl __flush_tlb_kernel_range | 78 | .globl __flush_tlb_kernel_range |
@@ -249,7 +250,7 @@ __cheetah_flush_tlb_mm: /* 15 insns */ | |||
249 | retl | 250 | retl |
250 | wrpr %g7, 0x0, %pstate | 251 | wrpr %g7, 0x0, %pstate |
251 | 252 | ||
252 | __cheetah_flush_tlb_pending: /* 22 insns */ | 253 | __cheetah_flush_tlb_pending: /* 23 insns */ |
253 | /* %o0 = context, %o1 = nr, %o2 = vaddrs[] */ | 254 | /* %o0 = context, %o1 = nr, %o2 = vaddrs[] */ |
254 | rdpr %pstate, %g7 | 255 | rdpr %pstate, %g7 |
255 | sllx %o1, 3, %o1 | 256 | sllx %o1, 3, %o1 |
@@ -317,7 +318,7 @@ cheetah_patch_cachetlbops: | |||
317 | sethi %hi(__cheetah_flush_tlb_pending), %o1 | 318 | sethi %hi(__cheetah_flush_tlb_pending), %o1 |
318 | or %o1, %lo(__cheetah_flush_tlb_pending), %o1 | 319 | or %o1, %lo(__cheetah_flush_tlb_pending), %o1 |
319 | call cheetah_patch_one | 320 | call cheetah_patch_one |
320 | mov 22, %o2 | 321 | mov 23, %o2 |
321 | 322 | ||
322 | #ifdef DCACHE_ALIASING_POSSIBLE | 323 | #ifdef DCACHE_ALIASING_POSSIBLE |
323 | sethi %hi(__flush_dcache_page), %o0 | 324 | sethi %hi(__flush_dcache_page), %o0 |