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authorDavid S. Miller <davem@davemloft.net>2005-07-04 17:53:33 -0400
committerDavid S. Miller <davem@davemloft.net>2005-07-04 17:53:33 -0400
commit9fba62a59cf1407cd5495f6c61d22d169ca1553f (patch)
tree0cd0b5f2afac3913cc8297817e5887a455cbe227 /arch/sparc64
parentbb6743f4f0aed5c1f09fa77cd8d3973c31792f4f (diff)
[SPARC64]: Small Schizo PCI controller programming tweaks.
Use macro instead of magic value for Tomatillo discard- timeout interrupt enable register bit. Leave OBP programming PTO value unless Tomatillo and version >= 0x2. If no-bus-parking property is present, explicitly clear PCICTRL_PARK bit. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64')
-rw-r--r--arch/sparc64/kernel/pci_schizo.c23
1 files changed, 8 insertions, 15 deletions
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index 68b1a63a178c..f4f68e150d74 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -933,6 +933,7 @@ static irqreturn_t schizo_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
933 933
934#define SCHIZO_PCI_CTRL (0x2000UL) 934#define SCHIZO_PCI_CTRL (0x2000UL)
935#define SCHIZO_PCICTRL_BUS_UNUS (1UL << 63UL) /* Safari */ 935#define SCHIZO_PCICTRL_BUS_UNUS (1UL << 63UL) /* Safari */
936#define SCHIZO_PCICTRL_DTO_INT (1UL << 61UL) /* Tomatillo */
936#define SCHIZO_PCICTRL_ARB_PRIO (0x1ff << 52UL) /* Tomatillo */ 937#define SCHIZO_PCICTRL_ARB_PRIO (0x1ff << 52UL) /* Tomatillo */
937#define SCHIZO_PCICTRL_ESLCK (1UL << 51UL) /* Safari */ 938#define SCHIZO_PCICTRL_ESLCK (1UL << 51UL) /* Safari */
938#define SCHIZO_PCICTRL_ERRSLOT (7UL << 48UL) /* Safari */ 939#define SCHIZO_PCICTRL_ERRSLOT (7UL << 48UL) /* Safari */
@@ -1939,33 +1940,25 @@ static void __init schizo_pbm_hw_init(struct pci_pbm_info *pbm)
1939 schizo_write(pbm->pbm_regs + SCHIZO_PCI_IRQ_RETRY, 1940 schizo_write(pbm->pbm_regs + SCHIZO_PCI_IRQ_RETRY,
1940 SCHIZO_IRQ_RETRY_INF); 1941 SCHIZO_IRQ_RETRY_INF);
1941 1942
1942 /* Enable arbiter for all PCI slots. Also, disable PCI interval
1943 * timer so that DTO (Discard TimeOuts) are not reported because
1944 * some Schizo revisions report them erroneously.
1945 */
1946 tmp = schizo_read(pbm->pbm_regs + SCHIZO_PCI_CTRL); 1943 tmp = schizo_read(pbm->pbm_regs + SCHIZO_PCI_CTRL);
1947 if (pbm->chip_type == PBM_CHIP_TYPE_SCHIZO_PLUS &&
1948 pbm->chip_version == 0x5 &&
1949 pbm->chip_revision == 0x1)
1950 tmp |= 0x0f;
1951 else
1952 tmp |= 0xff;
1953 1944
1954 tmp &= ~SCHIZO_PCICTRL_PTO; 1945 /* Enable arbiter for all PCI slots. */
1946 tmp |= 0xff;
1947
1955 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO && 1948 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO &&
1956 pbm->chip_version >= 0x2) 1949 pbm->chip_version >= 0x2)
1957 tmp |= 0x3UL << SCHIZO_PCICTRL_PTO_SHIFT; 1950 tmp |= 0x3UL << SCHIZO_PCICTRL_PTO_SHIFT;
1958 else
1959 tmp |= 0x1UL << SCHIZO_PCICTRL_PTO_SHIFT;
1960 1951
1961 if (!prom_getbool(pbm->prom_node, "no-bus-parking")) 1952 if (!prom_getbool(pbm->prom_node, "no-bus-parking"))
1962 tmp |= SCHIZO_PCICTRL_PARK; 1953 tmp |= SCHIZO_PCICTRL_PARK;
1954 else
1955 tmp &= ~SCHIZO_PCICTRL_PARK;
1963 1956
1964 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO && 1957 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO &&
1965 pbm->chip_version <= 0x1) 1958 pbm->chip_version <= 0x1)
1966 tmp |= (1UL << 61); 1959 tmp |= SCHIZO_PCICTRL_DTO_INT;
1967 else 1960 else
1968 tmp &= ~(1UL << 61); 1961 tmp &= ~SCHIZO_PCICTRL_DTO_INT;
1969 1962
1970 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) 1963 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO)
1971 tmp |= (SCHIZO_PCICTRL_MRM_PREF | 1964 tmp |= (SCHIZO_PCICTRL_MRM_PREF |