[SPARC64]: SMP trampoline needs to avoid %tick_cmpr on sun4v too.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 3 insertions, 4 deletions

diff --git a/arch/sparc64/kernel/trampoline.S b/arch/sparc64/kernel/trampoline.S
index 9448595f9063..9533a25ce5d2 100644
--- a/arch/sparc64/kernel/trampoline.S
+++ b/arch/sparc64/kernel/trampoline.S
@@ -95,14 +95,13 @@ spitfire_startup:
         membar          #Sync
 
 startup_continue:
+        mov             %o0, %l0
+        BRANCH_IF_SUN4V(g1, niagara_lock_tlb)
+
         sethi           %hi(0x80000000), %g2
         sllx            %g2, 32, %g2
         wr              %g2, 0, %tick_cmpr
 
-        mov             %o0, %l0
-
-        BRANCH_IF_SUN4V(g1, niagara_lock_tlb)
-
         /* Call OBP by hand to lock KERNBASE into i/d tlbs.
          * We lock 2 consequetive entries if we are 'bigkernel'.
          */