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authorDavid S. Miller <davem@davemloft.net>2008-09-01 06:18:49 -0400
committerDavid S. Miller <davem@davemloft.net>2008-09-01 06:18:49 -0400
commitfefbbc73cac6f7360460cee45e3d4cc209d8d607 (patch)
treeced12702e0f705b1c4b6b437c6e171f96c680825 /arch/sparc64
parent687124dda0beeb8503ae27a1588e4705b3a588c2 (diff)
sparc64: Use ENTRY/ENDPROC in PCI SUN4V asm.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64')
-rw-r--r--arch/sparc64/kernel/pci_sun4v_asm.S99
1 files changed, 50 insertions, 49 deletions
diff --git a/arch/sparc64/kernel/pci_sun4v_asm.S b/arch/sparc64/kernel/pci_sun4v_asm.S
index ecb81f389b06..e606d46c6815 100644
--- a/arch/sparc64/kernel/pci_sun4v_asm.S
+++ b/arch/sparc64/kernel/pci_sun4v_asm.S
@@ -1,8 +1,9 @@
1/* pci_sun4v_asm: Hypervisor calls for PCI support. 1/* pci_sun4v_asm: Hypervisor calls for PCI support.
2 * 2 *
3 * Copyright (C) 2006 David S. Miller <davem@davemloft.net> 3 * Copyright (C) 2006, 2008 David S. Miller <davem@davemloft.net>
4 */ 4 */
5 5
6#include <linux/linkage.h>
6#include <asm/hypervisor.h> 7#include <asm/hypervisor.h>
7 8
8 /* %o0: devhandle 9 /* %o0: devhandle
@@ -14,8 +15,7 @@
14 * returns %o0: -status if status was non-zero, else 15 * returns %o0: -status if status was non-zero, else
15 * %o0: num pages mapped 16 * %o0: num pages mapped
16 */ 17 */
17 .globl pci_sun4v_iommu_map 18ENTRY(pci_sun4v_iommu_map)
18pci_sun4v_iommu_map:
19 mov %o5, %g1 19 mov %o5, %g1
20 mov HV_FAST_PCI_IOMMU_MAP, %o5 20 mov HV_FAST_PCI_IOMMU_MAP, %o5
21 ta HV_FAST_TRAP 21 ta HV_FAST_TRAP
@@ -24,6 +24,7 @@ pci_sun4v_iommu_map:
24 mov %o1, %o0 24 mov %o1, %o0
251: retl 251: retl
26 nop 26 nop
27ENDPROC(pci_sun4v_iommu_map)
27 28
28 /* %o0: devhandle 29 /* %o0: devhandle
29 * %o1: tsbid 30 * %o1: tsbid
@@ -31,12 +32,12 @@ pci_sun4v_iommu_map:
31 * 32 *
32 * returns %o0: num ttes demapped 33 * returns %o0: num ttes demapped
33 */ 34 */
34 .globl pci_sun4v_iommu_demap 35ENTRY(pci_sun4v_iommu_demap)
35pci_sun4v_iommu_demap:
36 mov HV_FAST_PCI_IOMMU_DEMAP, %o5 36 mov HV_FAST_PCI_IOMMU_DEMAP, %o5
37 ta HV_FAST_TRAP 37 ta HV_FAST_TRAP
38 retl 38 retl
39 mov %o1, %o0 39 mov %o1, %o0
40ENDPROC(pci_sun4v_iommu_demap)
40 41
41 /* %o0: devhandle 42 /* %o0: devhandle
42 * %o1: tsbid 43 * %o1: tsbid
@@ -45,8 +46,7 @@ pci_sun4v_iommu_demap:
45 * 46 *
46 * returns %o0: status 47 * returns %o0: status
47 */ 48 */
48 .globl pci_sun4v_iommu_getmap 49ENTRY(pci_sun4v_iommu_getmap)
49pci_sun4v_iommu_getmap:
50 mov %o2, %o4 50 mov %o2, %o4
51 mov HV_FAST_PCI_IOMMU_GETMAP, %o5 51 mov HV_FAST_PCI_IOMMU_GETMAP, %o5
52 ta HV_FAST_TRAP 52 ta HV_FAST_TRAP
@@ -54,6 +54,7 @@ pci_sun4v_iommu_getmap:
54 stx %o2, [%o3] 54 stx %o2, [%o3]
55 retl 55 retl
56 mov %o0, %o0 56 mov %o0, %o0
57ENDPROC(pci_sun4v_iommu_getmap)
57 58
58 /* %o0: devhandle 59 /* %o0: devhandle
59 * %o1: pci_device 60 * %o1: pci_device
@@ -65,14 +66,14 @@ pci_sun4v_iommu_getmap:
65 * If there is an error, the data will be returned 66 * If there is an error, the data will be returned
66 * as all 1's. 67 * as all 1's.
67 */ 68 */
68 .globl pci_sun4v_config_get 69ENTRY(pci_sun4v_config_get)
69pci_sun4v_config_get:
70 mov HV_FAST_PCI_CONFIG_GET, %o5 70 mov HV_FAST_PCI_CONFIG_GET, %o5
71 ta HV_FAST_TRAP 71 ta HV_FAST_TRAP
72 brnz,a,pn %o1, 1f 72 brnz,a,pn %o1, 1f
73 mov -1, %o2 73 mov -1, %o2
741: retl 741: retl
75 mov %o2, %o0 75 mov %o2, %o0
76ENDPROC(pci_sun4v_config_get)
76 77
77 /* %o0: devhandle 78 /* %o0: devhandle
78 * %o1: pci_device 79 * %o1: pci_device
@@ -85,14 +86,14 @@ pci_sun4v_config_get:
85 * status will be zero if the operation completed 86 * status will be zero if the operation completed
86 * successfully, else -1 if not 87 * successfully, else -1 if not
87 */ 88 */
88 .globl pci_sun4v_config_put 89ENTRY(pci_sun4v_config_put)
89pci_sun4v_config_put:
90 mov HV_FAST_PCI_CONFIG_PUT, %o5 90 mov HV_FAST_PCI_CONFIG_PUT, %o5
91 ta HV_FAST_TRAP 91 ta HV_FAST_TRAP
92 brnz,a,pn %o1, 1f 92 brnz,a,pn %o1, 1f
93 mov -1, %o1 93 mov -1, %o1
941: retl 941: retl
95 mov %o1, %o0 95 mov %o1, %o0
96ENDPROC(pci_sun4v_config_put)
96 97
97 /* %o0: devhandle 98 /* %o0: devhandle
98 * %o1: msiqid 99 * %o1: msiqid
@@ -104,12 +105,12 @@ pci_sun4v_config_put:
104 * status will be zero if the operation completed 105 * status will be zero if the operation completed
105 * successfully, else -1 if not 106 * successfully, else -1 if not
106 */ 107 */
107 .globl pci_sun4v_msiq_conf 108ENTRY(pci_sun4v_msiq_conf)
108pci_sun4v_msiq_conf:
109 mov HV_FAST_PCI_MSIQ_CONF, %o5 109 mov HV_FAST_PCI_MSIQ_CONF, %o5
110 ta HV_FAST_TRAP 110 ta HV_FAST_TRAP
111 retl 111 retl
112 mov %o0, %o0 112 mov %o0, %o0
113ENDPROC(pci_sun4v_msiq_conf)
113 114
114 /* %o0: devhandle 115 /* %o0: devhandle
115 * %o1: msiqid 116 * %o1: msiqid
@@ -118,8 +119,7 @@ pci_sun4v_msiq_conf:
118 * 119 *
119 * returns %o0: status 120 * returns %o0: status
120 */ 121 */
121 .globl pci_sun4v_msiq_info 122ENTRY(pci_sun4v_msiq_info)
122pci_sun4v_msiq_info:
123 mov %o2, %o4 123 mov %o2, %o4
124 mov HV_FAST_PCI_MSIQ_INFO, %o5 124 mov HV_FAST_PCI_MSIQ_INFO, %o5
125 ta HV_FAST_TRAP 125 ta HV_FAST_TRAP
@@ -127,6 +127,7 @@ pci_sun4v_msiq_info:
127 stx %o2, [%o3] 127 stx %o2, [%o3]
128 retl 128 retl
129 mov %o0, %o0 129 mov %o0, %o0
130ENDPROC(pci_sun4v_msiq_info)
130 131
131 /* %o0: devhandle 132 /* %o0: devhandle
132 * %o1: msiqid 133 * %o1: msiqid
@@ -134,13 +135,13 @@ pci_sun4v_msiq_info:
134 * 135 *
135 * returns %o0: status 136 * returns %o0: status
136 */ 137 */
137 .globl pci_sun4v_msiq_getvalid 138ENTRY(pci_sun4v_msiq_getvalid)
138pci_sun4v_msiq_getvalid:
139 mov HV_FAST_PCI_MSIQ_GETVALID, %o5 139 mov HV_FAST_PCI_MSIQ_GETVALID, %o5
140 ta HV_FAST_TRAP 140 ta HV_FAST_TRAP
141 stx %o1, [%o2] 141 stx %o1, [%o2]
142 retl 142 retl
143 mov %o0, %o0 143 mov %o0, %o0
144ENDPROC(pci_sun4v_msiq_getvalid)
144 145
145 /* %o0: devhandle 146 /* %o0: devhandle
146 * %o1: msiqid 147 * %o1: msiqid
@@ -148,12 +149,12 @@ pci_sun4v_msiq_getvalid:
148 * 149 *
149 * returns %o0: status 150 * returns %o0: status
150 */ 151 */
151 .globl pci_sun4v_msiq_setvalid 152ENTRY(pci_sun4v_msiq_setvalid)
152pci_sun4v_msiq_setvalid:
153 mov HV_FAST_PCI_MSIQ_SETVALID, %o5 153 mov HV_FAST_PCI_MSIQ_SETVALID, %o5
154 ta HV_FAST_TRAP 154 ta HV_FAST_TRAP
155 retl 155 retl
156 mov %o0, %o0 156 mov %o0, %o0
157ENDPROC(pci_sun4v_msiq_setvalid)
157 158
158 /* %o0: devhandle 159 /* %o0: devhandle
159 * %o1: msiqid 160 * %o1: msiqid
@@ -161,13 +162,13 @@ pci_sun4v_msiq_setvalid:
161 * 162 *
162 * returns %o0: status 163 * returns %o0: status
163 */ 164 */
164 .globl pci_sun4v_msiq_getstate 165ENTRY(pci_sun4v_msiq_getstate)
165pci_sun4v_msiq_getstate:
166 mov HV_FAST_PCI_MSIQ_GETSTATE, %o5 166 mov HV_FAST_PCI_MSIQ_GETSTATE, %o5
167 ta HV_FAST_TRAP 167 ta HV_FAST_TRAP
168 stx %o1, [%o2] 168 stx %o1, [%o2]
169 retl 169 retl
170 mov %o0, %o0 170 mov %o0, %o0
171ENDPROC(pci_sun4v_msiq_getstate)
171 172
172 /* %o0: devhandle 173 /* %o0: devhandle
173 * %o1: msiqid 174 * %o1: msiqid
@@ -175,12 +176,12 @@ pci_sun4v_msiq_getstate:
175 * 176 *
176 * returns %o0: status 177 * returns %o0: status
177 */ 178 */
178 .globl pci_sun4v_msiq_setstate 179ENTRY(pci_sun4v_msiq_setstate)
179pci_sun4v_msiq_setstate:
180 mov HV_FAST_PCI_MSIQ_SETSTATE, %o5 180 mov HV_FAST_PCI_MSIQ_SETSTATE, %o5
181 ta HV_FAST_TRAP 181 ta HV_FAST_TRAP
182 retl 182 retl
183 mov %o0, %o0 183 mov %o0, %o0
184ENDPROC(pci_sun4v_msiq_setstate)
184 185
185 /* %o0: devhandle 186 /* %o0: devhandle
186 * %o1: msiqid 187 * %o1: msiqid
@@ -188,13 +189,13 @@ pci_sun4v_msiq_setstate:
188 * 189 *
189 * returns %o0: status 190 * returns %o0: status
190 */ 191 */
191 .globl pci_sun4v_msiq_gethead 192ENTRY(pci_sun4v_msiq_gethead)
192pci_sun4v_msiq_gethead:
193 mov HV_FAST_PCI_MSIQ_GETHEAD, %o5 193 mov HV_FAST_PCI_MSIQ_GETHEAD, %o5
194 ta HV_FAST_TRAP 194 ta HV_FAST_TRAP
195 stx %o1, [%o2] 195 stx %o1, [%o2]
196 retl 196 retl
197 mov %o0, %o0 197 mov %o0, %o0
198ENDPROC(pci_sun4v_msiq_gethead)
198 199
199 /* %o0: devhandle 200 /* %o0: devhandle
200 * %o1: msiqid 201 * %o1: msiqid
@@ -202,12 +203,12 @@ pci_sun4v_msiq_gethead:
202 * 203 *
203 * returns %o0: status 204 * returns %o0: status
204 */ 205 */
205 .globl pci_sun4v_msiq_sethead 206ENTRY(pci_sun4v_msiq_sethead)
206pci_sun4v_msiq_sethead:
207 mov HV_FAST_PCI_MSIQ_SETHEAD, %o5 207 mov HV_FAST_PCI_MSIQ_SETHEAD, %o5
208 ta HV_FAST_TRAP 208 ta HV_FAST_TRAP
209 retl 209 retl
210 mov %o0, %o0 210 mov %o0, %o0
211ENDPROC(pci_sun4v_msiq_sethead)
211 212
212 /* %o0: devhandle 213 /* %o0: devhandle
213 * %o1: msiqid 214 * %o1: msiqid
@@ -215,13 +216,13 @@ pci_sun4v_msiq_sethead:
215 * 216 *
216 * returns %o0: status 217 * returns %o0: status
217 */ 218 */
218 .globl pci_sun4v_msiq_gettail 219ENTRY(pci_sun4v_msiq_gettail)
219pci_sun4v_msiq_gettail:
220 mov HV_FAST_PCI_MSIQ_GETTAIL, %o5 220 mov HV_FAST_PCI_MSIQ_GETTAIL, %o5
221 ta HV_FAST_TRAP 221 ta HV_FAST_TRAP
222 stx %o1, [%o2] 222 stx %o1, [%o2]
223 retl 223 retl
224 mov %o0, %o0 224 mov %o0, %o0
225ENDPROC(pci_sun4v_msiq_gettail)
225 226
226 /* %o0: devhandle 227 /* %o0: devhandle
227 * %o1: msinum 228 * %o1: msinum
@@ -229,13 +230,13 @@ pci_sun4v_msiq_gettail:
229 * 230 *
230 * returns %o0: status 231 * returns %o0: status
231 */ 232 */
232 .globl pci_sun4v_msi_getvalid 233ENTRY(pci_sun4v_msi_getvalid)
233pci_sun4v_msi_getvalid:
234 mov HV_FAST_PCI_MSI_GETVALID, %o5 234 mov HV_FAST_PCI_MSI_GETVALID, %o5
235 ta HV_FAST_TRAP 235 ta HV_FAST_TRAP
236 stx %o1, [%o2] 236 stx %o1, [%o2]
237 retl 237 retl
238 mov %o0, %o0 238 mov %o0, %o0
239ENDPROC(pci_sun4v_msi_getvalid)
239 240
240 /* %o0: devhandle 241 /* %o0: devhandle
241 * %o1: msinum 242 * %o1: msinum
@@ -243,12 +244,12 @@ pci_sun4v_msi_getvalid:
243 * 244 *
244 * returns %o0: status 245 * returns %o0: status
245 */ 246 */
246 .globl pci_sun4v_msi_setvalid 247ENTRY(pci_sun4v_msi_setvalid)
247pci_sun4v_msi_setvalid:
248 mov HV_FAST_PCI_MSI_SETVALID, %o5 248 mov HV_FAST_PCI_MSI_SETVALID, %o5
249 ta HV_FAST_TRAP 249 ta HV_FAST_TRAP
250 retl 250 retl
251 mov %o0, %o0 251 mov %o0, %o0
252ENDPROC(pci_sun4v_msi_setvalid)
252 253
253 /* %o0: devhandle 254 /* %o0: devhandle
254 * %o1: msinum 255 * %o1: msinum
@@ -256,13 +257,13 @@ pci_sun4v_msi_setvalid:
256 * 257 *
257 * returns %o0: status 258 * returns %o0: status
258 */ 259 */
259 .globl pci_sun4v_msi_getmsiq 260ENTRY(pci_sun4v_msi_getmsiq)
260pci_sun4v_msi_getmsiq:
261 mov HV_FAST_PCI_MSI_GETMSIQ, %o5 261 mov HV_FAST_PCI_MSI_GETMSIQ, %o5
262 ta HV_FAST_TRAP 262 ta HV_FAST_TRAP
263 stx %o1, [%o2] 263 stx %o1, [%o2]
264 retl 264 retl
265 mov %o0, %o0 265 mov %o0, %o0
266ENDPROC(pci_sun4v_msi_getmsiq)
266 267
267 /* %o0: devhandle 268 /* %o0: devhandle
268 * %o1: msinum 269 * %o1: msinum
@@ -271,12 +272,12 @@ pci_sun4v_msi_getmsiq:
271 * 272 *
272 * returns %o0: status 273 * returns %o0: status
273 */ 274 */
274 .globl pci_sun4v_msi_setmsiq 275ENTRY(pci_sun4v_msi_setmsiq)
275pci_sun4v_msi_setmsiq:
276 mov HV_FAST_PCI_MSI_SETMSIQ, %o5 276 mov HV_FAST_PCI_MSI_SETMSIQ, %o5
277 ta HV_FAST_TRAP 277 ta HV_FAST_TRAP
278 retl 278 retl
279 mov %o0, %o0 279 mov %o0, %o0
280ENDPROC(pci_sun4v_msi_setmsiq)
280 281
281 /* %o0: devhandle 282 /* %o0: devhandle
282 * %o1: msinum 283 * %o1: msinum
@@ -284,13 +285,13 @@ pci_sun4v_msi_setmsiq:
284 * 285 *
285 * returns %o0: status 286 * returns %o0: status
286 */ 287 */
287 .globl pci_sun4v_msi_getstate 288ENTRY(pci_sun4v_msi_getstate)
288pci_sun4v_msi_getstate:
289 mov HV_FAST_PCI_MSI_GETSTATE, %o5 289 mov HV_FAST_PCI_MSI_GETSTATE, %o5
290 ta HV_FAST_TRAP 290 ta HV_FAST_TRAP
291 stx %o1, [%o2] 291 stx %o1, [%o2]
292 retl 292 retl
293 mov %o0, %o0 293 mov %o0, %o0
294ENDPROC(pci_sun4v_msi_getstate)
294 295
295 /* %o0: devhandle 296 /* %o0: devhandle
296 * %o1: msinum 297 * %o1: msinum
@@ -298,12 +299,12 @@ pci_sun4v_msi_getstate:
298 * 299 *
299 * returns %o0: status 300 * returns %o0: status
300 */ 301 */
301 .globl pci_sun4v_msi_setstate 302ENTRY(pci_sun4v_msi_setstate)
302pci_sun4v_msi_setstate:
303 mov HV_FAST_PCI_MSI_SETSTATE, %o5 303 mov HV_FAST_PCI_MSI_SETSTATE, %o5
304 ta HV_FAST_TRAP 304 ta HV_FAST_TRAP
305 retl 305 retl
306 mov %o0, %o0 306 mov %o0, %o0
307ENDPROC(pci_sun4v_msi_setstate)
307 308
308 /* %o0: devhandle 309 /* %o0: devhandle
309 * %o1: msinum 310 * %o1: msinum
@@ -311,13 +312,13 @@ pci_sun4v_msi_setstate:
311 * 312 *
312 * returns %o0: status 313 * returns %o0: status
313 */ 314 */
314 .globl pci_sun4v_msg_getmsiq 315ENTRY(pci_sun4v_msg_getmsiq)
315pci_sun4v_msg_getmsiq:
316 mov HV_FAST_PCI_MSG_GETMSIQ, %o5 316 mov HV_FAST_PCI_MSG_GETMSIQ, %o5
317 ta HV_FAST_TRAP 317 ta HV_FAST_TRAP
318 stx %o1, [%o2] 318 stx %o1, [%o2]
319 retl 319 retl
320 mov %o0, %o0 320 mov %o0, %o0
321ENDPROC(pci_sun4v_msg_getmsiq)
321 322
322 /* %o0: devhandle 323 /* %o0: devhandle
323 * %o1: msinum 324 * %o1: msinum
@@ -325,12 +326,12 @@ pci_sun4v_msg_getmsiq:
325 * 326 *
326 * returns %o0: status 327 * returns %o0: status
327 */ 328 */
328 .globl pci_sun4v_msg_setmsiq 329ENTRY(pci_sun4v_msg_setmsiq)
329pci_sun4v_msg_setmsiq:
330 mov HV_FAST_PCI_MSG_SETMSIQ, %o5 330 mov HV_FAST_PCI_MSG_SETMSIQ, %o5
331 ta HV_FAST_TRAP 331 ta HV_FAST_TRAP
332 retl 332 retl
333 mov %o0, %o0 333 mov %o0, %o0
334ENDPROC(pci_sun4v_msg_setmsiq)
334 335
335 /* %o0: devhandle 336 /* %o0: devhandle
336 * %o1: msinum 337 * %o1: msinum
@@ -338,13 +339,13 @@ pci_sun4v_msg_setmsiq:
338 * 339 *
339 * returns %o0: status 340 * returns %o0: status
340 */ 341 */
341 .globl pci_sun4v_msg_getvalid 342ENTRY(pci_sun4v_msg_getvalid)
342pci_sun4v_msg_getvalid:
343 mov HV_FAST_PCI_MSG_GETVALID, %o5 343 mov HV_FAST_PCI_MSG_GETVALID, %o5
344 ta HV_FAST_TRAP 344 ta HV_FAST_TRAP
345 stx %o1, [%o2] 345 stx %o1, [%o2]
346 retl 346 retl
347 mov %o0, %o0 347 mov %o0, %o0
348ENDPROC(pci_sun4v_msg_getvalid)
348 349
349 /* %o0: devhandle 350 /* %o0: devhandle
350 * %o1: msinum 351 * %o1: msinum
@@ -352,10 +353,10 @@ pci_sun4v_msg_getvalid:
352 * 353 *
353 * returns %o0: status 354 * returns %o0: status
354 */ 355 */
355 .globl pci_sun4v_msg_setvalid 356ENTRY(pci_sun4v_msg_setvalid)
356pci_sun4v_msg_setvalid:
357 mov HV_FAST_PCI_MSG_SETVALID, %o5 357 mov HV_FAST_PCI_MSG_SETVALID, %o5
358 ta HV_FAST_TRAP 358 ta HV_FAST_TRAP
359 retl 359 retl
360 mov %o0, %o0 360 mov %o0, %o0
361ENDPROC(pci_sun4v_msg_setvalid)
361 362