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author | David S. Miller <davem@davemloft.net> | 2008-09-10 17:08:27 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-09-10 17:08:27 -0400 |
commit | ebfb2c63405f2410897674f14e41c031c9302909 (patch) | |
tree | cbef6be0cfe72659e12309878ce9f773ff7c4505 /arch/sparc64 | |
parent | 2eb2f77900d62796934bcd43c4089e444cf1179e (diff) |
sparc64: Fix interrupt register calculations on Psycho and Sabre.
Use the IMAP offset calculation for OBIO devices as documented in the
programmer's manual. Which is "0x10000 + ((ino & 0x1f) << 3)"
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64')
-rw-r--r-- | arch/sparc64/kernel/prom.c | 104 |
1 files changed, 6 insertions, 98 deletions
diff --git a/arch/sparc64/kernel/prom.c b/arch/sparc64/kernel/prom.c index 3c048ac4e638..7151513f156e 100644 --- a/arch/sparc64/kernel/prom.c +++ b/arch/sparc64/kernel/prom.c | |||
@@ -156,55 +156,11 @@ static unsigned long psycho_pcislot_imap_offset(unsigned long ino) | |||
156 | return PSYCHO_IMAP_B_SLOT0 + (slot * 8); | 156 | return PSYCHO_IMAP_B_SLOT0 + (slot * 8); |
157 | } | 157 | } |
158 | 158 | ||
159 | #define PSYCHO_IMAP_SCSI 0x1000UL | 159 | #define PSYCHO_OBIO_IMAP_BASE 0x1000UL |
160 | #define PSYCHO_IMAP_ETH 0x1008UL | 160 | |
161 | #define PSYCHO_IMAP_BPP 0x1010UL | ||
162 | #define PSYCHO_IMAP_AU_REC 0x1018UL | ||
163 | #define PSYCHO_IMAP_AU_PLAY 0x1020UL | ||
164 | #define PSYCHO_IMAP_PFAIL 0x1028UL | ||
165 | #define PSYCHO_IMAP_KMS 0x1030UL | ||
166 | #define PSYCHO_IMAP_FLPY 0x1038UL | ||
167 | #define PSYCHO_IMAP_SHW 0x1040UL | ||
168 | #define PSYCHO_IMAP_KBD 0x1048UL | ||
169 | #define PSYCHO_IMAP_MS 0x1050UL | ||
170 | #define PSYCHO_IMAP_SER 0x1058UL | ||
171 | #define PSYCHO_IMAP_TIM0 0x1060UL | ||
172 | #define PSYCHO_IMAP_TIM1 0x1068UL | ||
173 | #define PSYCHO_IMAP_UE 0x1070UL | ||
174 | #define PSYCHO_IMAP_CE 0x1078UL | ||
175 | #define PSYCHO_IMAP_A_ERR 0x1080UL | ||
176 | #define PSYCHO_IMAP_B_ERR 0x1088UL | ||
177 | #define PSYCHO_IMAP_PMGMT 0x1090UL | ||
178 | #define PSYCHO_IMAP_GFX 0x1098UL | ||
179 | #define PSYCHO_IMAP_EUPA 0x10a0UL | ||
180 | |||
181 | static unsigned long __psycho_onboard_imap_off[] = { | ||
182 | /*0x20*/ PSYCHO_IMAP_SCSI, | ||
183 | /*0x21*/ PSYCHO_IMAP_ETH, | ||
184 | /*0x22*/ PSYCHO_IMAP_BPP, | ||
185 | /*0x23*/ PSYCHO_IMAP_AU_REC, | ||
186 | /*0x24*/ PSYCHO_IMAP_AU_PLAY, | ||
187 | /*0x25*/ PSYCHO_IMAP_PFAIL, | ||
188 | /*0x26*/ PSYCHO_IMAP_KMS, | ||
189 | /*0x27*/ PSYCHO_IMAP_FLPY, | ||
190 | /*0x28*/ PSYCHO_IMAP_SHW, | ||
191 | /*0x29*/ PSYCHO_IMAP_KBD, | ||
192 | /*0x2a*/ PSYCHO_IMAP_MS, | ||
193 | /*0x2b*/ PSYCHO_IMAP_SER, | ||
194 | /*0x2c*/ PSYCHO_IMAP_TIM0, | ||
195 | /*0x2d*/ PSYCHO_IMAP_TIM1, | ||
196 | /*0x2e*/ PSYCHO_IMAP_UE, | ||
197 | /*0x2f*/ PSYCHO_IMAP_CE, | ||
198 | /*0x30*/ PSYCHO_IMAP_A_ERR, | ||
199 | /*0x31*/ PSYCHO_IMAP_B_ERR, | ||
200 | /*0x32*/ PSYCHO_IMAP_PMGMT, | ||
201 | /*0x33*/ PSYCHO_IMAP_GFX, | ||
202 | /*0x34*/ PSYCHO_IMAP_EUPA, | ||
203 | }; | ||
204 | #define PSYCHO_ONBOARD_IRQ_BASE 0x20 | 161 | #define PSYCHO_ONBOARD_IRQ_BASE 0x20 |
205 | #define PSYCHO_ONBOARD_IRQ_LAST 0x34 | ||
206 | #define psycho_onboard_imap_offset(__ino) \ | 162 | #define psycho_onboard_imap_offset(__ino) \ |
207 | __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE] | 163 | (PSYCHO_OBIO_IMAP_BASE + (((__ino) & 0x1f) << 3)) |
208 | 164 | ||
209 | #define PSYCHO_ICLR_A_SLOT0 0x1400UL | 165 | #define PSYCHO_ICLR_A_SLOT0 0x1400UL |
210 | #define PSYCHO_ICLR_SCSI 0x1800UL | 166 | #define PSYCHO_ICLR_SCSI 0x1800UL |
@@ -228,10 +184,6 @@ static unsigned int psycho_irq_build(struct device_node *dp, | |||
228 | imap_off = psycho_pcislot_imap_offset(ino); | 184 | imap_off = psycho_pcislot_imap_offset(ino); |
229 | } else { | 185 | } else { |
230 | /* Onboard device */ | 186 | /* Onboard device */ |
231 | if (ino > PSYCHO_ONBOARD_IRQ_LAST) { | ||
232 | prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino); | ||
233 | prom_halt(); | ||
234 | } | ||
235 | imap_off = psycho_onboard_imap_offset(ino); | 187 | imap_off = psycho_onboard_imap_offset(ino); |
236 | } | 188 | } |
237 | 189 | ||
@@ -318,23 +270,6 @@ static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2) | |||
318 | 270 | ||
319 | #define SABRE_IMAP_A_SLOT0 0x0c00UL | 271 | #define SABRE_IMAP_A_SLOT0 0x0c00UL |
320 | #define SABRE_IMAP_B_SLOT0 0x0c20UL | 272 | #define SABRE_IMAP_B_SLOT0 0x0c20UL |
321 | #define SABRE_IMAP_SCSI 0x1000UL | ||
322 | #define SABRE_IMAP_ETH 0x1008UL | ||
323 | #define SABRE_IMAP_BPP 0x1010UL | ||
324 | #define SABRE_IMAP_AU_REC 0x1018UL | ||
325 | #define SABRE_IMAP_AU_PLAY 0x1020UL | ||
326 | #define SABRE_IMAP_PFAIL 0x1028UL | ||
327 | #define SABRE_IMAP_KMS 0x1030UL | ||
328 | #define SABRE_IMAP_FLPY 0x1038UL | ||
329 | #define SABRE_IMAP_SHW 0x1040UL | ||
330 | #define SABRE_IMAP_KBD 0x1048UL | ||
331 | #define SABRE_IMAP_MS 0x1050UL | ||
332 | #define SABRE_IMAP_SER 0x1058UL | ||
333 | #define SABRE_IMAP_UE 0x1070UL | ||
334 | #define SABRE_IMAP_CE 0x1078UL | ||
335 | #define SABRE_IMAP_PCIERR 0x1080UL | ||
336 | #define SABRE_IMAP_GFX 0x1098UL | ||
337 | #define SABRE_IMAP_EUPA 0x10a0UL | ||
338 | #define SABRE_ICLR_A_SLOT0 0x1400UL | 273 | #define SABRE_ICLR_A_SLOT0 0x1400UL |
339 | #define SABRE_ICLR_B_SLOT0 0x1480UL | 274 | #define SABRE_ICLR_B_SLOT0 0x1480UL |
340 | #define SABRE_ICLR_SCSI 0x1800UL | 275 | #define SABRE_ICLR_SCSI 0x1800UL |
@@ -364,33 +299,10 @@ static unsigned long sabre_pcislot_imap_offset(unsigned long ino) | |||
364 | return SABRE_IMAP_B_SLOT0 + (slot * 8); | 299 | return SABRE_IMAP_B_SLOT0 + (slot * 8); |
365 | } | 300 | } |
366 | 301 | ||
367 | static unsigned long __sabre_onboard_imap_off[] = { | 302 | #define SABRE_OBIO_IMAP_BASE 0x1000UL |
368 | /*0x20*/ SABRE_IMAP_SCSI, | 303 | #define SABRE_ONBOARD_IRQ_BASE 0x20 |
369 | /*0x21*/ SABRE_IMAP_ETH, | ||
370 | /*0x22*/ SABRE_IMAP_BPP, | ||
371 | /*0x23*/ SABRE_IMAP_AU_REC, | ||
372 | /*0x24*/ SABRE_IMAP_AU_PLAY, | ||
373 | /*0x25*/ SABRE_IMAP_PFAIL, | ||
374 | /*0x26*/ SABRE_IMAP_KMS, | ||
375 | /*0x27*/ SABRE_IMAP_FLPY, | ||
376 | /*0x28*/ SABRE_IMAP_SHW, | ||
377 | /*0x29*/ SABRE_IMAP_KBD, | ||
378 | /*0x2a*/ SABRE_IMAP_MS, | ||
379 | /*0x2b*/ SABRE_IMAP_SER, | ||
380 | /*0x2c*/ 0 /* reserved */, | ||
381 | /*0x2d*/ 0 /* reserved */, | ||
382 | /*0x2e*/ SABRE_IMAP_UE, | ||
383 | /*0x2f*/ SABRE_IMAP_CE, | ||
384 | /*0x30*/ SABRE_IMAP_PCIERR, | ||
385 | /*0x31*/ 0 /* reserved */, | ||
386 | /*0x32*/ 0 /* reserved */, | ||
387 | /*0x33*/ SABRE_IMAP_GFX, | ||
388 | /*0x34*/ SABRE_IMAP_EUPA, | ||
389 | }; | ||
390 | #define SABRE_ONBOARD_IRQ_BASE 0x20 | ||
391 | #define SABRE_ONBOARD_IRQ_LAST 0x30 | ||
392 | #define sabre_onboard_imap_offset(__ino) \ | 304 | #define sabre_onboard_imap_offset(__ino) \ |
393 | __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE] | 305 | (SABRE_OBIO_IMAP_BASE + (((__ino) & 0x1f) << 3)) |
394 | 306 | ||
395 | #define sabre_iclr_offset(ino) \ | 307 | #define sabre_iclr_offset(ino) \ |
396 | ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \ | 308 | ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \ |
@@ -453,10 +365,6 @@ static unsigned int sabre_irq_build(struct device_node *dp, | |||
453 | imap_off = sabre_pcislot_imap_offset(ino); | 365 | imap_off = sabre_pcislot_imap_offset(ino); |
454 | } else { | 366 | } else { |
455 | /* onboard device */ | 367 | /* onboard device */ |
456 | if (ino > SABRE_ONBOARD_IRQ_LAST) { | ||
457 | prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino); | ||
458 | prom_halt(); | ||
459 | } | ||
460 | imap_off = sabre_onboard_imap_offset(ino); | 368 | imap_off = sabre_onboard_imap_offset(ino); |
461 | } | 369 | } |
462 | 370 | ||