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authorDavid S. Miller <davem@sunset.davemloft.net>2007-12-13 09:13:38 -0500
committerDavid S. Miller <davem@sunset.davemloft.net>2007-12-13 09:13:38 -0500
commit8f361453d8e9a67c85b2cf9b93c642c2d8fe0462 (patch)
tree79c021106e2c3f708d085285680a29bb665c0b37 /arch/sparc64/mm
parentda8cadb31b82c9d41fc593c8deab6aa20b162d6b (diff)
[SPARC64]: Fix two kernel linear mapping setup bugs.
This was caught and identified by Greg Onufer. Since we setup the 256M/4M bitmap table after taking over the trap table, it's possible for some 4M mapping to get loaded in the TLB beforhand which later will be 256M mappings. This can cause illegal TLB multiple-match conditions. Fix this by setting up the bitmap before we take over the trap table. Next, __flush_tlb_all() was not doing anything on hypervisor platforms. Fix by adding sun4v_mmu_demap_all() and calling it. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/mm')
-rw-r--r--arch/sparc64/mm/init.c29
1 files changed, 20 insertions, 9 deletions
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index e18ccf85224f..fbeb55d71e76 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -1133,14 +1133,9 @@ static void __init mark_kpte_bitmap(unsigned long start, unsigned long end)
1133 } 1133 }
1134} 1134}
1135 1135
1136static void __init kernel_physical_mapping_init(void) 1136static void __init init_kpte_bitmap(void)
1137{ 1137{
1138 unsigned long i; 1138 unsigned long i;
1139#ifdef CONFIG_DEBUG_PAGEALLOC
1140 unsigned long mem_alloced = 0UL;
1141#endif
1142
1143 read_obp_memory("reg", &pall[0], &pall_ents);
1144 1139
1145 for (i = 0; i < pall_ents; i++) { 1140 for (i = 0; i < pall_ents; i++) {
1146 unsigned long phys_start, phys_end; 1141 unsigned long phys_start, phys_end;
@@ -1149,14 +1144,24 @@ static void __init kernel_physical_mapping_init(void)
1149 phys_end = phys_start + pall[i].reg_size; 1144 phys_end = phys_start + pall[i].reg_size;
1150 1145
1151 mark_kpte_bitmap(phys_start, phys_end); 1146 mark_kpte_bitmap(phys_start, phys_end);
1147 }
1148}
1152 1149
1150static void __init kernel_physical_mapping_init(void)
1151{
1153#ifdef CONFIG_DEBUG_PAGEALLOC 1152#ifdef CONFIG_DEBUG_PAGEALLOC
1153 unsigned long i, mem_alloced = 0UL;
1154
1155 for (i = 0; i < pall_ents; i++) {
1156 unsigned long phys_start, phys_end;
1157
1158 phys_start = pall[i].phys_addr;
1159 phys_end = phys_start + pall[i].reg_size;
1160
1154 mem_alloced += kernel_map_range(phys_start, phys_end, 1161 mem_alloced += kernel_map_range(phys_start, phys_end,
1155 PAGE_KERNEL); 1162 PAGE_KERNEL);
1156#endif
1157 } 1163 }
1158 1164
1159#ifdef CONFIG_DEBUG_PAGEALLOC
1160 printk("Allocated %ld bytes for kernel page tables.\n", 1165 printk("Allocated %ld bytes for kernel page tables.\n",
1161 mem_alloced); 1166 mem_alloced);
1162 1167
@@ -1398,6 +1403,10 @@ void __init paging_init(void)
1398 1403
1399 inherit_prom_mappings(); 1404 inherit_prom_mappings();
1400 1405
1406 read_obp_memory("reg", &pall[0], &pall_ents);
1407
1408 init_kpte_bitmap();
1409
1401 /* Ok, we can use our TLB miss and window trap handlers safely. */ 1410 /* Ok, we can use our TLB miss and window trap handlers safely. */
1402 setup_tba(); 1411 setup_tba();
1403 1412
@@ -1904,7 +1913,9 @@ void __flush_tlb_all(void)
1904 "wrpr %0, %1, %%pstate" 1913 "wrpr %0, %1, %%pstate"
1905 : "=r" (pstate) 1914 : "=r" (pstate)
1906 : "i" (PSTATE_IE)); 1915 : "i" (PSTATE_IE));
1907 if (tlb_type == spitfire) { 1916 if (tlb_type == hypervisor) {
1917 sun4v_mmu_demap_all();
1918 } else if (tlb_type == spitfire) {
1908 for (i = 0; i < 64; i++) { 1919 for (i = 0; i < 64; i++) {
1909 /* Spitfire Errata #32 workaround */ 1920 /* Spitfire Errata #32 workaround */
1910 /* NOTE: Always runs on spitfire, so no 1921 /* NOTE: Always runs on spitfire, so no