[SPARC64]: More TLB/TSB handling fixes.

The SUN4V convention with non-shared TSBs is that the context
bit of the TAG is clear.  So we have to choose an "invalid"
bit and initialize new TSBs appropriately.  Otherwise a zero
TAG looks "valid".

Make sure, for the window fixup cases, that we use the right
global registers and that we don't potentially trample on
the live global registers in etrap/rtrap handling (%g2 and
%g6) and that we put the missing virtual address properly
in %g5.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 3 insertions, 1 deletions

diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index bd9e3205674b..aa2aec6373c3 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -296,7 +296,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t p
 
                 tsb = &mm->context.tsb[(address >> PAGE_SHIFT) &
                                        (mm->context.tsb_nentries - 1UL)];
-                tag = (address >> 22UL) | CTX_HWBITS(mm->context) << 48UL;
+                tag = (address >> 22UL);
                 tsb_insert(tsb, tag, pte_val(pte));
         }
 }
@@ -1110,6 +1110,8 @@ void __init paging_init(void)
         kern_base = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
         kern_size = (unsigned long)&_end - (unsigned long)KERNBASE;
 
+        memset(swapper_tsb, 0x40, sizeof(swapper_tsb));
+
         if (tlb_type == hypervisor)
                 sun4v_pgprot_init();
         else