[LIB]: Consolidate _atomic_dec_and_lock()

Several implementations were essentialy a common piece of C code using
the cmpxchg() macro.  Put the implementation in one spot that everyone
can share, and convert sparc64 over to using this.

Alpha is the lone arch-specific implementation, which codes up a
special fast path for the common case in order to avoid GP reloading
which a pure C version would require.

Signed-off-by: David S. Miller <davem@davemloft.net>

2 files changed, 0 insertions, 82 deletions

diff --git a/arch/sparc64/lib/Makefile b/arch/sparc64/lib/Makefile
index d968aebe83b2..c295806500f7 100644
--- a/arch/sparc64/lib/Makefile
+++ b/arch/sparc64/lib/Makefile
@@ -14,6 +14,4 @@ lib-y := PeeCeeI.o copy_page.o clear_page.o strlen.o strncmp.o \
          copy_in_user.o user_fixup.o memmove.o \
          mcount.o ipcsum.o rwsem.o xor.o find_bit.o delay.o
 
-lib-$(CONFIG_HAVE_DEC_LOCK) += dec_and_lock.o
-
 obj-y += iomap.o
diff --git a/arch/sparc64/lib/dec_and_lock.S b/arch/sparc64/lib/dec_and_lock.S
deleted file mode 100644
index 8ee288dd0afc..000000000000
--- a/arch/sparc64/lib/dec_and_lock.S
+++ /dev/null
@@ -1,80 +0,0 @@
-/* $Id: dec_and_lock.S,v 1.5 2001/11/18 00:12:56 davem Exp $
- * dec_and_lock.S: Sparc64 version of "atomic_dec_and_lock()"
- *                 using cas and ldstub instructions.
- *
- * Copyright (C) 2000 David S. Miller (davem@redhat.com)
- */
-#include <linux/config.h>
-#include <asm/thread_info.h>
-
-        .text
-        .align  64
-
-        /* CAS basically works like this:
-         *
-         * void CAS(MEM, REG1, REG2)
-         * {
-         *   START_ATOMIC();
-         *   if (*(MEM) == REG1) {
-         *     TMP = *(MEM);
-         *     *(MEM) = REG2;
-         *     REG2 = TMP;
-         *   } else
-         *     REG2 = *(MEM);
-         *   END_ATOMIC();
-         * }
-         */
-
-        .globl  _atomic_dec_and_lock
-_atomic_dec_and_lock:   /* %o0 = counter, %o1 = lock */
-loop1:  lduw    [%o0], %g2
-        subcc   %g2, 1, %g7
-        be,pn   %icc, start_to_zero
-         nop
-nzero:  cas     [%o0], %g2, %g7
-        cmp     %g2, %g7
-        bne,pn  %icc, loop1
-         mov    0, %g1
-
-out:
-        membar  #StoreLoad | #StoreStore
-        retl
-         mov    %g1, %o0
-start_to_zero:
-#ifdef CONFIG_PREEMPT
-        ldsw    [%g6 + TI_PRE_COUNT], %g3
-        add     %g3, 1, %g3
-        stw     %g3, [%g6 + TI_PRE_COUNT]
-#endif
-to_zero:
-        ldstub  [%o1], %g3
-        membar  #StoreLoad | #StoreStore
-        brnz,pn %g3, spin_on_lock
-         nop
-loop2:  cas     [%o0], %g2, %g7         /* ASSERT(g7 == 0) */
-        cmp     %g2, %g7
-
-        be,pt   %icc, out
-         mov    1, %g1
-        lduw    [%o0], %g2
-        subcc   %g2, 1, %g7
-        be,pn   %icc, loop2
-         nop
-        membar  #StoreStore | #LoadStore
-        stb     %g0, [%o1]
-#ifdef CONFIG_PREEMPT
-        ldsw    [%g6 + TI_PRE_COUNT], %g3
-        sub     %g3, 1, %g3
-        stw     %g3, [%g6 + TI_PRE_COUNT]
-#endif
-
-        b,pt    %xcc, nzero
-         nop
-spin_on_lock:
-        ldub    [%o1], %g3
-        membar  #LoadLoad
-        brnz,pt %g3, spin_on_lock
-         nop
-        ba,pt   %xcc, to_zero
-         nop
-        nop