diff options
author | David S. Miller <davem@davemloft.net> | 2008-11-15 16:33:25 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-12-04 12:16:47 -0500 |
commit | 293666b7a17cb7a389fc274980439212386a19c4 (patch) | |
tree | 075cc7661d2113cf04da7130b3383979d8024206 /arch/sparc64/lib/rwsem.S | |
parent | 64f2dde3f743c8a1ad8c0a1aa74166c1034afd92 (diff) |
sparc64: Stop using memory barriers for atomics and locks.
The kernel always executes in the TSO memory model now,
so none of this stuff is necessary any more.
With helpful feedback from Nick Piggin.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/lib/rwsem.S')
-rw-r--r-- | arch/sparc64/lib/rwsem.S | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/sparc64/lib/rwsem.S b/arch/sparc64/lib/rwsem.S index 1a4cc5654de4..91a7d29a79d5 100644 --- a/arch/sparc64/lib/rwsem.S +++ b/arch/sparc64/lib/rwsem.S | |||
@@ -17,7 +17,6 @@ __down_read: | |||
17 | bne,pn %icc, 1b | 17 | bne,pn %icc, 1b |
18 | add %g7, 1, %g7 | 18 | add %g7, 1, %g7 |
19 | cmp %g7, 0 | 19 | cmp %g7, 0 |
20 | membar #StoreLoad | #StoreStore | ||
21 | bl,pn %icc, 3f | 20 | bl,pn %icc, 3f |
22 | nop | 21 | nop |
23 | 2: | 22 | 2: |
@@ -42,7 +41,6 @@ __down_read_trylock: | |||
42 | cmp %g1, %g7 | 41 | cmp %g1, %g7 |
43 | bne,pn %icc, 1b | 42 | bne,pn %icc, 1b |
44 | mov 1, %o1 | 43 | mov 1, %o1 |
45 | membar #StoreLoad | #StoreStore | ||
46 | 2: retl | 44 | 2: retl |
47 | mov %o1, %o0 | 45 | mov %o1, %o0 |
48 | .size __down_read_trylock, .-__down_read_trylock | 46 | .size __down_read_trylock, .-__down_read_trylock |
@@ -58,7 +56,6 @@ __down_write: | |||
58 | cmp %g3, %g7 | 56 | cmp %g3, %g7 |
59 | bne,pn %icc, 1b | 57 | bne,pn %icc, 1b |
60 | cmp %g7, 0 | 58 | cmp %g7, 0 |
61 | membar #StoreLoad | #StoreStore | ||
62 | bne,pn %icc, 3f | 59 | bne,pn %icc, 3f |
63 | nop | 60 | nop |
64 | 2: retl | 61 | 2: retl |
@@ -85,7 +82,6 @@ __down_write_trylock: | |||
85 | cmp %g3, %g7 | 82 | cmp %g3, %g7 |
86 | bne,pn %icc, 1b | 83 | bne,pn %icc, 1b |
87 | mov 1, %o1 | 84 | mov 1, %o1 |
88 | membar #StoreLoad | #StoreStore | ||
89 | 2: retl | 85 | 2: retl |
90 | mov %o1, %o0 | 86 | mov %o1, %o0 |
91 | .size __down_write_trylock, .-__down_write_trylock | 87 | .size __down_write_trylock, .-__down_write_trylock |
@@ -99,7 +95,6 @@ __up_read: | |||
99 | cmp %g1, %g7 | 95 | cmp %g1, %g7 |
100 | bne,pn %icc, 1b | 96 | bne,pn %icc, 1b |
101 | cmp %g7, 0 | 97 | cmp %g7, 0 |
102 | membar #StoreLoad | #StoreStore | ||
103 | bl,pn %icc, 3f | 98 | bl,pn %icc, 3f |
104 | nop | 99 | nop |
105 | 2: retl | 100 | 2: retl |
@@ -129,7 +124,6 @@ __up_write: | |||
129 | bne,pn %icc, 1b | 124 | bne,pn %icc, 1b |
130 | sub %g7, %g1, %g7 | 125 | sub %g7, %g1, %g7 |
131 | cmp %g7, 0 | 126 | cmp %g7, 0 |
132 | membar #StoreLoad | #StoreStore | ||
133 | bl,pn %icc, 3f | 127 | bl,pn %icc, 3f |
134 | nop | 128 | nop |
135 | 2: | 129 | 2: |
@@ -155,7 +149,6 @@ __downgrade_write: | |||
155 | bne,pn %icc, 1b | 149 | bne,pn %icc, 1b |
156 | sub %g7, %g1, %g7 | 150 | sub %g7, %g1, %g7 |
157 | cmp %g7, 0 | 151 | cmp %g7, 0 |
158 | membar #StoreLoad | #StoreStore | ||
159 | bl,pn %icc, 3f | 152 | bl,pn %icc, 3f |
160 | nop | 153 | nop |
161 | 2: | 154 | 2: |