aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sparc64/kernel
diff options
context:
space:
mode:
authorDavid S. Miller <davem@sunset.davemloft.net>2005-10-11 18:45:16 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2005-10-11 18:45:16 -0400
commitb1b510aa284af1908d5d369d52f7dae16aaabd71 (patch)
treedd79875667adf73552c4b9c4789aee2b4ada8368 /arch/sparc64/kernel
parent08eb8f124f990aa476589d1f7810f7ec7f259c08 (diff)
[SPARC64]: Fix net booting on Ultra5
We were not doing alignment properly when remapping the kernel image. What we want is a 4MB aligned physical address to map at KERNBASE. Mistakedly we were 4MB aligning the virtual address where the kernel initially sits, that's wrong. Instead, we should PAGE align the virtual address, then 4MB align the physical address result the prom gives to us. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel')
-rw-r--r--arch/sparc64/kernel/head.S8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S
index f1dcdf8f7433..4c942f71184d 100644
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc64/kernel/head.S
@@ -191,8 +191,9 @@ prom_boot_mapping_phys_low:
191 stx %l3, [%sp + 2047 + 128 + 0x10] ! num_rets, 5 191 stx %l3, [%sp + 2047 + 128 + 0x10] ! num_rets, 5
192 stx %l2, [%sp + 2047 + 128 + 0x18] ! arg1: "translate" 192 stx %l2, [%sp + 2047 + 128 + 0x18] ! arg1: "translate"
193 stx %l5, [%sp + 2047 + 128 + 0x20] ! arg2: prom_mmu_ihandle_cache 193 stx %l5, [%sp + 2047 + 128 + 0x20] ! arg2: prom_mmu_ihandle_cache
194 srlx %l0, 22, %l3 194 /* PAGE align */
195 sllx %l3, 22, %l3 195 srlx %l0, 13, %l3
196 sllx %l3, 13, %l3
196 stx %l3, [%sp + 2047 + 128 + 0x28] ! arg3: vaddr, our PC 197 stx %l3, [%sp + 2047 + 128 + 0x28] ! arg3: vaddr, our PC
197 stx %g0, [%sp + 2047 + 128 + 0x30] ! res1 198 stx %g0, [%sp + 2047 + 128 + 0x30] ! res1
198 stx %g0, [%sp + 2047 + 128 + 0x38] ! res2 199 stx %g0, [%sp + 2047 + 128 + 0x38] ! res2
@@ -211,6 +212,9 @@ prom_boot_mapping_phys_low:
211 ldx [%sp + 2047 + 128 + 0x48], %l2 ! physaddr high 212 ldx [%sp + 2047 + 128 + 0x48], %l2 ! physaddr high
212 stx %l2, [%l4 + 0x0] 213 stx %l2, [%l4 + 0x0]
213 ldx [%sp + 2047 + 128 + 0x50], %l3 ! physaddr low 214 ldx [%sp + 2047 + 128 + 0x50], %l3 ! physaddr low
215 /* 4MB align */
216 srlx %l3, 22, %l3
217 sllx %l3, 22, %l3
214 stx %l3, [%l4 + 0x8] 218 stx %l3, [%l4 + 0x8]
215 219
216 /* Leave service as-is, "call-method" */ 220 /* Leave service as-is, "call-method" */