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authorDavid S. Miller <davem@davemloft.net>2006-06-20 04:20:00 -0400
committerDavid S. Miller <davem@davemloft.net>2006-06-20 04:20:00 -0400
commitfd0504c3217d6d1bc8f33f53fb536299cae8feda (patch)
tree4379f5376358d1f54fc183f458614f289ed6d326 /arch/sparc64/kernel/sun4v_ivec.S
parent3185d4d2873a46ca1620d784013f285522091aa0 (diff)
[SPARC64]: Send all device interrupts via one PIL.
This is the first in a series of cleanups that will hopefully allow a seamless attempt at using the generic IRQ handling infrastructure in the Linux kernel. Define PIL_DEVICE_IRQ and vector all device interrupts through there. Get rid of the ugly pil0_dummy_{bucket,desc}, instead vector the timer interrupt directly to a specific handler since the timer interrupt is the only event that will be signaled on PIL 14. The irq_worklist is now in the per-cpu trap_block[]. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/sun4v_ivec.S')
-rw-r--r--arch/sparc64/kernel/sun4v_ivec.S13
1 files changed, 4 insertions, 9 deletions
diff --git a/arch/sparc64/kernel/sun4v_ivec.S b/arch/sparc64/kernel/sun4v_ivec.S
index b49a68bdda43..f70e4774649d 100644
--- a/arch/sparc64/kernel/sun4v_ivec.S
+++ b/arch/sparc64/kernel/sun4v_ivec.S
@@ -5,6 +5,7 @@
5 5
6#include <asm/cpudata.h> 6#include <asm/cpudata.h>
7#include <asm/intr_queue.h> 7#include <asm/intr_queue.h>
8#include <asm/pil.h>
8 9
9 .text 10 .text
10 .align 32 11 .align 32
@@ -106,19 +107,13 @@ sun4v_dev_mondo:
106 or %g4, %lo(ivector_table), %g4 107 or %g4, %lo(ivector_table), %g4
107 add %g4, %g3, %g4 108 add %g4, %g3, %g4
108 109
109 /* Load IRQ %pil into %g5. */
110 ldub [%g4 + 0x04], %g5
111
112 /* Insert ivector_table[] entry into __irq_work[] queue. */ 110 /* Insert ivector_table[] entry into __irq_work[] queue. */
113 sllx %g5, 2, %g3 111 lduw [%g1], %g2 /* g2 = irq_work(cpu) */
114 lduw [%g1 + %g3], %g2 /* g2 = irq_work(cpu, pil) */
115 stw %g2, [%g4 + 0x00] /* bucket->irq_chain = g2 */ 112 stw %g2, [%g4 + 0x00] /* bucket->irq_chain = g2 */
116 stw %g4, [%g1 + %g3] /* irq_work(cpu, pil) = bucket */ 113 stw %g4, [%g1] /* irq_work(cpu) = bucket */
117 114
118 /* Signal the interrupt by setting (1 << pil) in %softint. */ 115 /* Signal the interrupt by setting (1 << pil) in %softint. */
119 mov 1, %g2 116 wr %g0, 1 << PIL_DEVICE_IRQ, %set_softint
120 sllx %g2, %g5, %g2
121 wr %g2, 0x0, %set_softint
122 117
123sun4v_dev_mondo_queue_empty: 118sun4v_dev_mondo_queue_empty:
124 retry 119 retry