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authorDavid S. Miller <davem@sunset.davemloft.net>2007-10-14 00:51:37 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-14 00:53:16 -0400
commitb80e6998120eecec00781658bc43702494117ea8 (patch)
tree7923d42de2f1248549b0cb35900953b78b570caf /arch/sparc64/kernel/sun4v_ivec.S
parent10397e4069bbcc8219537e7c1e0d6a6935432156 (diff)
[SPARC64]: Use sun4v VIRQ interfaces as intended.
We were simply concatenating the devhandle and devino and using that as the cookie, which defeats the entire purpose of the VIRQ hypervisor interfaces. Now that we use physical addresses for the INO buckets, we can allocate them dynamically for VIRQs and encode the cookies as ~__pa(bucket). This allows us to test for and decode the cookie with a simple: brlz $reg1, 1f xnor $reg1, %g0, $reg2 sequence. This works because bit 64 is never set in traditional INO vectors, and it is also never set in a physical address. So xnor'ing the physical address of the bucket always gives us a negative number, and thus a unique condition we can test cheaply. Inspired by ideas from Greg Onufer. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/sun4v_ivec.S')
-rw-r--r--arch/sparc64/kernel/sun4v_ivec.S6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/sparc64/kernel/sun4v_ivec.S b/arch/sparc64/kernel/sun4v_ivec.S
index 16d306445912..e2f8e1b4882a 100644
--- a/arch/sparc64/kernel/sun4v_ivec.S
+++ b/arch/sparc64/kernel/sun4v_ivec.S
@@ -98,13 +98,17 @@ sun4v_dev_mondo:
98 98
99 TRAP_LOAD_IRQ_WORK_PA(%g1, %g4) 99 TRAP_LOAD_IRQ_WORK_PA(%g1, %g4)
100 100
101 /* For VIRQs, cookie is encoded as ~bucket_phys_addr */
102 brlz,pt %g3, 1f
103 xnor %g3, %g0, %g4
104
101 /* Get __pa(&ivector_table[IVEC]) into %g4. */ 105 /* Get __pa(&ivector_table[IVEC]) into %g4. */
102 sethi %hi(ivector_table_pa), %g4 106 sethi %hi(ivector_table_pa), %g4
103 ldx [%g4 + %lo(ivector_table_pa)], %g4 107 ldx [%g4 + %lo(ivector_table_pa)], %g4
104 sllx %g3, 4, %g3 108 sllx %g3, 4, %g3
105 add %g4, %g3, %g4 109 add %g4, %g3, %g4
106 110
107 ldx [%g1], %g2 1111: ldx [%g1], %g2
108 stxa %g2, [%g4] ASI_PHYS_USE_EC 112 stxa %g2, [%g4] ASI_PHYS_USE_EC
109 stx %g4, [%g1] 113 stx %g4, [%g1]
110 114