diff options
author | David S. Miller <davem@sunset.davemloft.net> | 2007-05-25 18:49:59 -0400 |
---|---|---|
committer | David S. Miller <davem@sunset.davemloft.net> | 2007-05-29 05:49:41 -0400 |
commit | 5cbc30737398b49f62ae8603129ce43ac7db1a41 (patch) | |
tree | 45d01a686865e6fd9c32b670f77af1e37db03008 /arch/sparc64/kernel/sun4v_ivec.S | |
parent | e01c0d6d8cf29c1c11725837b265598cab687952 (diff) |
[SPARC64]: Use machine description and OBP properly for cpu probing.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/sun4v_ivec.S')
-rw-r--r-- | arch/sparc64/kernel/sun4v_ivec.S | 30 |
1 files changed, 14 insertions, 16 deletions
diff --git a/arch/sparc64/kernel/sun4v_ivec.S b/arch/sparc64/kernel/sun4v_ivec.S index 405855dd886b..574bc248bca6 100644 --- a/arch/sparc64/kernel/sun4v_ivec.S +++ b/arch/sparc64/kernel/sun4v_ivec.S | |||
@@ -22,12 +22,12 @@ sun4v_cpu_mondo: | |||
22 | be,pn %xcc, sun4v_cpu_mondo_queue_empty | 22 | be,pn %xcc, sun4v_cpu_mondo_queue_empty |
23 | nop | 23 | nop |
24 | 24 | ||
25 | /* Get &trap_block[smp_processor_id()] into %g3. */ | 25 | /* Get &trap_block[smp_processor_id()] into %g4. */ |
26 | ldxa [%g0] ASI_SCRATCHPAD, %g3 | 26 | ldxa [%g0] ASI_SCRATCHPAD, %g4 |
27 | sub %g3, TRAP_PER_CPU_FAULT_INFO, %g3 | 27 | sub %g4, TRAP_PER_CPU_FAULT_INFO, %g4 |
28 | 28 | ||
29 | /* Get CPU mondo queue base phys address into %g7. */ | 29 | /* Get CPU mondo queue base phys address into %g7. */ |
30 | ldx [%g3 + TRAP_PER_CPU_CPU_MONDO_PA], %g7 | 30 | ldx [%g4 + TRAP_PER_CPU_CPU_MONDO_PA], %g7 |
31 | 31 | ||
32 | /* Now get the cross-call arguments and handler PC, same | 32 | /* Now get the cross-call arguments and handler PC, same |
33 | * layout as sun4u: | 33 | * layout as sun4u: |
@@ -47,8 +47,7 @@ sun4v_cpu_mondo: | |||
47 | add %g2, 0x40 - 0x8 - 0x8, %g2 | 47 | add %g2, 0x40 - 0x8 - 0x8, %g2 |
48 | 48 | ||
49 | /* Update queue head pointer. */ | 49 | /* Update queue head pointer. */ |
50 | sethi %hi(8192 - 1), %g4 | 50 | lduw [%g4 + TRAP_PER_CPU_CPU_MONDO_QMASK], %g4 |
51 | or %g4, %lo(8192 - 1), %g4 | ||
52 | and %g2, %g4, %g2 | 51 | and %g2, %g4, %g2 |
53 | 52 | ||
54 | mov INTRQ_CPU_MONDO_HEAD, %g4 | 53 | mov INTRQ_CPU_MONDO_HEAD, %g4 |
@@ -71,12 +70,12 @@ sun4v_dev_mondo: | |||
71 | be,pn %xcc, sun4v_dev_mondo_queue_empty | 70 | be,pn %xcc, sun4v_dev_mondo_queue_empty |
72 | nop | 71 | nop |
73 | 72 | ||
74 | /* Get &trap_block[smp_processor_id()] into %g3. */ | 73 | /* Get &trap_block[smp_processor_id()] into %g4. */ |
75 | ldxa [%g0] ASI_SCRATCHPAD, %g3 | 74 | ldxa [%g0] ASI_SCRATCHPAD, %g4 |
76 | sub %g3, TRAP_PER_CPU_FAULT_INFO, %g3 | 75 | sub %g4, TRAP_PER_CPU_FAULT_INFO, %g4 |
77 | 76 | ||
78 | /* Get DEV mondo queue base phys address into %g5. */ | 77 | /* Get DEV mondo queue base phys address into %g5. */ |
79 | ldx [%g3 + TRAP_PER_CPU_DEV_MONDO_PA], %g5 | 78 | ldx [%g4 + TRAP_PER_CPU_DEV_MONDO_PA], %g5 |
80 | 79 | ||
81 | /* Load IVEC into %g3. */ | 80 | /* Load IVEC into %g3. */ |
82 | ldxa [%g5 + %g2] ASI_PHYS_USE_EC, %g3 | 81 | ldxa [%g5 + %g2] ASI_PHYS_USE_EC, %g3 |
@@ -90,8 +89,7 @@ sun4v_dev_mondo: | |||
90 | */ | 89 | */ |
91 | 90 | ||
92 | /* Update queue head pointer, this frees up some registers. */ | 91 | /* Update queue head pointer, this frees up some registers. */ |
93 | sethi %hi(8192 - 1), %g4 | 92 | lduw [%g4 + TRAP_PER_CPU_DEV_MONDO_QMASK], %g4 |
94 | or %g4, %lo(8192 - 1), %g4 | ||
95 | and %g2, %g4, %g2 | 93 | and %g2, %g4, %g2 |
96 | 94 | ||
97 | mov INTRQ_DEVICE_MONDO_HEAD, %g4 | 95 | mov INTRQ_DEVICE_MONDO_HEAD, %g4 |
@@ -143,6 +141,8 @@ sun4v_res_mondo: | |||
143 | brnz,pn %g1, sun4v_res_mondo_queue_full | 141 | brnz,pn %g1, sun4v_res_mondo_queue_full |
144 | nop | 142 | nop |
145 | 143 | ||
144 | lduw [%g3 + TRAP_PER_CPU_RESUM_QMASK], %g4 | ||
145 | |||
146 | /* Remember this entry's offset in %g1. */ | 146 | /* Remember this entry's offset in %g1. */ |
147 | mov %g2, %g1 | 147 | mov %g2, %g1 |
148 | 148 | ||
@@ -173,8 +173,6 @@ sun4v_res_mondo: | |||
173 | add %g2, 0x08, %g2 | 173 | add %g2, 0x08, %g2 |
174 | 174 | ||
175 | /* Update queue head pointer. */ | 175 | /* Update queue head pointer. */ |
176 | sethi %hi(8192 - 1), %g4 | ||
177 | or %g4, %lo(8192 - 1), %g4 | ||
178 | and %g2, %g4, %g2 | 176 | and %g2, %g4, %g2 |
179 | 177 | ||
180 | mov INTRQ_RESUM_MONDO_HEAD, %g4 | 178 | mov INTRQ_RESUM_MONDO_HEAD, %g4 |
@@ -254,6 +252,8 @@ sun4v_nonres_mondo: | |||
254 | brnz,pn %g1, sun4v_nonres_mondo_queue_full | 252 | brnz,pn %g1, sun4v_nonres_mondo_queue_full |
255 | nop | 253 | nop |
256 | 254 | ||
255 | lduw [%g3 + TRAP_PER_CPU_NONRESUM_QMASK], %g4 | ||
256 | |||
257 | /* Remember this entry's offset in %g1. */ | 257 | /* Remember this entry's offset in %g1. */ |
258 | mov %g2, %g1 | 258 | mov %g2, %g1 |
259 | 259 | ||
@@ -284,8 +284,6 @@ sun4v_nonres_mondo: | |||
284 | add %g2, 0x08, %g2 | 284 | add %g2, 0x08, %g2 |
285 | 285 | ||
286 | /* Update queue head pointer. */ | 286 | /* Update queue head pointer. */ |
287 | sethi %hi(8192 - 1), %g4 | ||
288 | or %g4, %lo(8192 - 1), %g4 | ||
289 | and %g2, %g4, %g2 | 287 | and %g2, %g4, %g2 |
290 | 288 | ||
291 | mov INTRQ_NONRESUM_MONDO_HEAD, %g4 | 289 | mov INTRQ_NONRESUM_MONDO_HEAD, %g4 |