diff options
| author | David S. Miller <davem@sunset.davemloft.net> | 2006-02-10 18:39:51 -0500 |
|---|---|---|
| committer | David S. Miller <davem@sunset.davemloft.net> | 2006-03-20 04:12:15 -0500 |
| commit | 12eaa328f9fb2d3fcb5afb682c762690d05a3cd8 (patch) | |
| tree | cce4e68b971757010a3e0bbf035fc65a381a3cd4 /arch/sparc64/kernel/sun4v_ivec.S | |
| parent | 18397944642cbca7fcd4a109b43ed5b4652e95b9 (diff) | |
[SPARC64]: Use ASI_SCRATCHPAD address 0x0 properly.
This is where the virtual address of the fault status
area belongs.
To set it up we don't make a hypervisor call, instead
we call OBP's SUNW,set-trap-table with the real address
of the fault status area as the second argument. And
right before that call we write the virtual address into
ASI_SCRATCHPAD vaddr 0x0.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/sun4v_ivec.S')
| -rw-r--r-- | arch/sparc64/kernel/sun4v_ivec.S | 28 |
1 files changed, 8 insertions, 20 deletions
diff --git a/arch/sparc64/kernel/sun4v_ivec.S b/arch/sparc64/kernel/sun4v_ivec.S index d9d442017d3d..c0367ef7e098 100644 --- a/arch/sparc64/kernel/sun4v_ivec.S +++ b/arch/sparc64/kernel/sun4v_ivec.S | |||
| @@ -22,11 +22,8 @@ sun4v_cpu_mondo: | |||
| 22 | nop | 22 | nop |
| 23 | 23 | ||
| 24 | /* Get &trap_block[smp_processor_id()] into %g3. */ | 24 | /* Get &trap_block[smp_processor_id()] into %g3. */ |
| 25 | __GET_CPUID(%g1) | 25 | ldxa [%g0] ASI_SCRATCHPAD, %g3 |
| 26 | sethi %hi(trap_block), %g3 | 26 | sub %g3, TRAP_PER_CPU_FAULT_INFO, %g3 |
| 27 | sllx %g1, TRAP_BLOCK_SZ_SHIFT, %g7 | ||
| 28 | or %g3, %lo(trap_block), %g3 | ||
| 29 | add %g3, %g7, %g3 | ||
| 30 | 27 | ||
| 31 | /* Get CPU mondo queue base phys address into %g7. */ | 28 | /* Get CPU mondo queue base phys address into %g7. */ |
| 32 | ldx [%g3 + TRAP_PER_CPU_CPU_MONDO_PA], %g7 | 29 | ldx [%g3 + TRAP_PER_CPU_CPU_MONDO_PA], %g7 |
| @@ -74,11 +71,8 @@ sun4v_dev_mondo: | |||
| 74 | nop | 71 | nop |
| 75 | 72 | ||
| 76 | /* Get &trap_block[smp_processor_id()] into %g3. */ | 73 | /* Get &trap_block[smp_processor_id()] into %g3. */ |
| 77 | __GET_CPUID(%g1) | 74 | ldxa [%g0] ASI_SCRATCHPAD, %g3 |
| 78 | sethi %hi(trap_block), %g3 | 75 | sub %g3, TRAP_PER_CPU_FAULT_INFO, %g3 |
| 79 | sllx %g1, TRAP_BLOCK_SZ_SHIFT, %g7 | ||
| 80 | or %g3, %lo(trap_block), %g3 | ||
| 81 | add %g3, %g7, %g3 | ||
| 82 | 76 | ||
| 83 | /* Get DEV mondo queue base phys address into %g5. */ | 77 | /* Get DEV mondo queue base phys address into %g5. */ |
| 84 | ldx [%g3 + TRAP_PER_CPU_DEV_MONDO_PA], %g5 | 78 | ldx [%g3 + TRAP_PER_CPU_DEV_MONDO_PA], %g5 |
| @@ -143,11 +137,8 @@ sun4v_res_mondo: | |||
| 143 | nop | 137 | nop |
| 144 | 138 | ||
| 145 | /* Get &trap_block[smp_processor_id()] into %g3. */ | 139 | /* Get &trap_block[smp_processor_id()] into %g3. */ |
| 146 | __GET_CPUID(%g1) | 140 | ldxa [%g0] ASI_SCRATCHPAD, %g3 |
| 147 | sethi %hi(trap_block), %g3 | 141 | sub %g3, TRAP_PER_CPU_FAULT_INFO, %g3 |
| 148 | sllx %g1, TRAP_BLOCK_SZ_SHIFT, %g7 | ||
| 149 | or %g3, %lo(trap_block), %g3 | ||
| 150 | add %g3, %g7, %g3 | ||
| 151 | 142 | ||
| 152 | /* Get RES mondo queue base phys address into %g5. */ | 143 | /* Get RES mondo queue base phys address into %g5. */ |
| 153 | ldx [%g3 + TRAP_PER_CPU_RESUM_MONDO_PA], %g5 | 144 | ldx [%g3 + TRAP_PER_CPU_RESUM_MONDO_PA], %g5 |
| @@ -251,11 +242,8 @@ sun4v_nonres_mondo: | |||
| 251 | nop | 242 | nop |
| 252 | 243 | ||
| 253 | /* Get &trap_block[smp_processor_id()] into %g3. */ | 244 | /* Get &trap_block[smp_processor_id()] into %g3. */ |
| 254 | __GET_CPUID(%g1) | 245 | ldxa [%g0] ASI_SCRATCHPAD, %g3 |
| 255 | sethi %hi(trap_block), %g3 | 246 | sub %g3, TRAP_PER_CPU_FAULT_INFO, %g3 |
| 256 | sllx %g1, TRAP_BLOCK_SZ_SHIFT, %g7 | ||
| 257 | or %g3, %lo(trap_block), %g3 | ||
| 258 | add %g3, %g7, %g3 | ||
| 259 | 247 | ||
| 260 | /* Get RES mondo queue base phys address into %g5. */ | 248 | /* Get RES mondo queue base phys address into %g5. */ |
| 261 | ldx [%g3 + TRAP_PER_CPU_NONRESUM_MONDO_PA], %g5 | 249 | ldx [%g3 + TRAP_PER_CPU_NONRESUM_MONDO_PA], %g5 |