[SPARC64]: Make IVEC pointers 64-bit.

Currently we chain IVEC entries using 32-bit "pointers"
because we know that the ivector_table is in the main
kernel image, thus below 4GB.

This uses proper 64-bit pointers instead.

Whilst this bloats up the kernel image size, this sets
the infrastructure necessary to significantly shrink the
kernel size by using physical addresses and dynamically
allocating the ivector table.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 4 insertions, 4 deletions

diff --git a/arch/sparc64/kernel/sun4v_ivec.S b/arch/sparc64/kernel/sun4v_ivec.S
index 574bc248bca6..e3e9d4c1574b 100644
--- a/arch/sparc64/kernel/sun4v_ivec.S
+++ b/arch/sparc64/kernel/sun4v_ivec.S
@@ -101,14 +101,14 @@ sun4v_dev_mondo:
 
         /* Get &ivector_table[IVEC] into %g4.  */
         sethi   %hi(ivector_table), %g4
-        sllx    %g3, 3, %g3
+        sllx    %g3, 4, %g3
         or      %g4, %lo(ivector_table), %g4
         add     %g4, %g3, %g4
 
         /* Insert ivector_table[] entry into __irq_work[] queue.  */
-        lduw    [%g1], %g2              /* g2 = irq_work(cpu) */
-        stw     %g2, [%g4 + 0x00]       /* bucket->irq_chain = g2 */
-        stw     %g4, [%g1]              /* irq_work(cpu) = bucket */
+        ldx     [%g1], %g2              /* g2 = irq_work(cpu) */
+        stx     %g2, [%g4 + 0x00]       /* bucket->irq_chain = g2 */
+        stx     %g4, [%g1]              /* irq_work(cpu) = bucket */
 
         /* Signal the interrupt by setting (1 << pil) in %softint.  */
         wr      %g0, 1 << PIL_DEVICE_IRQ, %set_softint