sparc64: Make %pil level 15 a pseudo-NMI.

So that we can profile code even in a local_irq_disable() section,
only write 14 (instead of 15) into the %pil register to disable IRQs.

This allows PIL level 15 to serve as a pseudo NMI.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/sparc64/kernel/spiterrs.S b/arch/sparc64/kernel/spiterrs.S
index ef902c6f8e3c..c357e40ffd01 100644
--- a/arch/sparc64/kernel/spiterrs.S
+++ b/arch/sparc64/kernel/spiterrs.S
@@ -80,7 +80,7 @@ __spitfire_cee_trap_continue:
         cmp             %g2, 1
         rdpr            %pil, %g2
         bleu,pt         %xcc, 1f
-         wrpr           %g0, 15, %pil
+         wrpr           %g0, PIL_NORMAL_MAX, %pil
 
         ba,pt           %xcc, etraptl1
          rd             %pc, %g7