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authorDavid S. Miller <davem@davemloft.net>2006-02-27 02:27:19 -0500
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 04:11:35 -0500
commit92704a1c63c3b481870d02636d0b5a70c7e21cd1 (patch)
tree098f96da6ab50a1d878425e2b91a9cf22f78ac80 /arch/sparc64/kernel/smp.c
parentf4e841da30b4bcbb8f1cc20a01157a788ff58b21 (diff)
[SPARC64]: Refine code sequences to get the cpu id.
On uniprocessor, it's always zero for optimize that. On SMP, the jmpl to the stub kills the return address stack in the cpu branch prediction logic, so expand the code sequence inline and use a code patching section to fix things up. This also always better and explicit register selection, which will be taken advantage of in a future changeset. The hard_smp_processor_id() function is big, so do not inline it. Fix up tests for Jalapeno to also test for Serrano chips too. These tests want "jbus Ultra-IIIi" cases to match, so that is what we should test for. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/smp.c')
-rw-r--r--arch/sparc64/kernel/smp.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index 0e7552546d36..16b8eca9754e 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -424,7 +424,7 @@ static __inline__ void spitfire_xcall_deliver(u64 data0, u64 data1, u64 data2, c
424static void cheetah_xcall_deliver(u64 data0, u64 data1, u64 data2, cpumask_t mask) 424static void cheetah_xcall_deliver(u64 data0, u64 data1, u64 data2, cpumask_t mask)
425{ 425{
426 u64 pstate, ver; 426 u64 pstate, ver;
427 int nack_busy_id, is_jalapeno; 427 int nack_busy_id, is_jbus;
428 428
429 if (cpus_empty(mask)) 429 if (cpus_empty(mask))
430 return; 430 return;
@@ -434,7 +434,8 @@ static void cheetah_xcall_deliver(u64 data0, u64 data1, u64 data2, cpumask_t mas
434 * derivative processor. 434 * derivative processor.
435 */ 435 */
436 __asm__ ("rdpr %%ver, %0" : "=r" (ver)); 436 __asm__ ("rdpr %%ver, %0" : "=r" (ver));
437 is_jalapeno = ((ver >> 32) == 0x003e0016); 437 is_jbus = ((ver >> 32) == __JALAPENO_ID ||
438 (ver >> 32) == __SERRANO_ID);
438 439
439 __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate)); 440 __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate));
440 441
@@ -459,7 +460,7 @@ retry:
459 for_each_cpu_mask(i, mask) { 460 for_each_cpu_mask(i, mask) {
460 u64 target = (i << 14) | 0x70; 461 u64 target = (i << 14) | 0x70;
461 462
462 if (!is_jalapeno) 463 if (!is_jbus)
463 target |= (nack_busy_id << 24); 464 target |= (nack_busy_id << 24);
464 __asm__ __volatile__( 465 __asm__ __volatile__(
465 "stxa %%g0, [%0] %1\n\t" 466 "stxa %%g0, [%0] %1\n\t"
@@ -512,7 +513,7 @@ retry:
512 for_each_cpu_mask(i, mask) { 513 for_each_cpu_mask(i, mask) {
513 u64 check_mask; 514 u64 check_mask;
514 515
515 if (is_jalapeno) 516 if (is_jbus)
516 check_mask = (0x2UL << (2*i)); 517 check_mask = (0x2UL << (2*i));
517 else 518 else
518 check_mask = (0x2UL << 519 check_mask = (0x2UL <<