diff options
author | David S. Miller <davem@davemloft.net> | 2008-11-15 16:33:25 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-12-04 12:16:47 -0500 |
commit | 293666b7a17cb7a389fc274980439212386a19c4 (patch) | |
tree | 075cc7661d2113cf04da7130b3383979d8024206 /arch/sparc64/kernel/smp.c | |
parent | 64f2dde3f743c8a1ad8c0a1aa74166c1034afd92 (diff) |
sparc64: Stop using memory barriers for atomics and locks.
The kernel always executes in the TSO memory model now,
so none of this stuff is necessary any more.
With helpful feedback from Nick Piggin.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/smp.c')
-rw-r--r-- | arch/sparc64/kernel/smp.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c index f500b0618bb0..c6d06362728c 100644 --- a/arch/sparc64/kernel/smp.c +++ b/arch/sparc64/kernel/smp.c | |||
@@ -163,7 +163,7 @@ static inline long get_delta (long *rt, long *master) | |||
163 | for (i = 0; i < NUM_ITERS; i++) { | 163 | for (i = 0; i < NUM_ITERS; i++) { |
164 | t0 = tick_ops->get_tick(); | 164 | t0 = tick_ops->get_tick(); |
165 | go[MASTER] = 1; | 165 | go[MASTER] = 1; |
166 | membar_storeload(); | 166 | membar_safe("#StoreLoad"); |
167 | while (!(tm = go[SLAVE])) | 167 | while (!(tm = go[SLAVE])) |
168 | rmb(); | 168 | rmb(); |
169 | go[SLAVE] = 0; | 169 | go[SLAVE] = 0; |
@@ -257,7 +257,7 @@ static void smp_synchronize_one_tick(int cpu) | |||
257 | 257 | ||
258 | /* now let the client proceed into his loop */ | 258 | /* now let the client proceed into his loop */ |
259 | go[MASTER] = 0; | 259 | go[MASTER] = 0; |
260 | membar_storeload(); | 260 | membar_safe("#StoreLoad"); |
261 | 261 | ||
262 | spin_lock_irqsave(&itc_sync_lock, flags); | 262 | spin_lock_irqsave(&itc_sync_lock, flags); |
263 | { | 263 | { |
@@ -267,7 +267,7 @@ static void smp_synchronize_one_tick(int cpu) | |||
267 | go[MASTER] = 0; | 267 | go[MASTER] = 0; |
268 | wmb(); | 268 | wmb(); |
269 | go[SLAVE] = tick_ops->get_tick(); | 269 | go[SLAVE] = tick_ops->get_tick(); |
270 | membar_storeload(); | 270 | membar_safe("#StoreLoad"); |
271 | } | 271 | } |
272 | } | 272 | } |
273 | spin_unlock_irqrestore(&itc_sync_lock, flags); | 273 | spin_unlock_irqrestore(&itc_sync_lock, flags); |
@@ -1122,7 +1122,6 @@ void smp_capture(void) | |||
1122 | smp_processor_id()); | 1122 | smp_processor_id()); |
1123 | #endif | 1123 | #endif |
1124 | penguins_are_doing_time = 1; | 1124 | penguins_are_doing_time = 1; |
1125 | membar_storestore_loadstore(); | ||
1126 | atomic_inc(&smp_capture_registry); | 1125 | atomic_inc(&smp_capture_registry); |
1127 | smp_cross_call(&xcall_capture, 0, 0, 0); | 1126 | smp_cross_call(&xcall_capture, 0, 0, 0); |
1128 | while (atomic_read(&smp_capture_registry) != ncpus) | 1127 | while (atomic_read(&smp_capture_registry) != ncpus) |
@@ -1142,7 +1141,7 @@ void smp_release(void) | |||
1142 | smp_processor_id()); | 1141 | smp_processor_id()); |
1143 | #endif | 1142 | #endif |
1144 | penguins_are_doing_time = 0; | 1143 | penguins_are_doing_time = 0; |
1145 | membar_storeload_storestore(); | 1144 | membar_safe("#StoreLoad"); |
1146 | atomic_dec(&smp_capture_registry); | 1145 | atomic_dec(&smp_capture_registry); |
1147 | } | 1146 | } |
1148 | } | 1147 | } |
@@ -1161,7 +1160,7 @@ void smp_penguin_jailcell(int irq, struct pt_regs *regs) | |||
1161 | __asm__ __volatile__("flushw"); | 1160 | __asm__ __volatile__("flushw"); |
1162 | prom_world(1); | 1161 | prom_world(1); |
1163 | atomic_inc(&smp_capture_registry); | 1162 | atomic_inc(&smp_capture_registry); |
1164 | membar_storeload_storestore(); | 1163 | membar_safe("#StoreLoad"); |
1165 | while (penguins_are_doing_time) | 1164 | while (penguins_are_doing_time) |
1166 | rmb(); | 1165 | rmb(); |
1167 | atomic_dec(&smp_capture_registry); | 1166 | atomic_dec(&smp_capture_registry); |