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authorDavid S. Miller <davem@davemloft.net>2006-01-31 21:34:51 -0500
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 04:11:29 -0500
commit86b818687d4894063ecd1190e54717a0cce8c009 (patch)
treed2951295358502c88f7fe0c02517d729cff4eb9a /arch/sparc64/kernel/rtrap.S
parent9954863975910a1b9372b7d5006a6cba43bdd288 (diff)
[SPARC64]: Fix race in LOAD_PER_CPU_BASE()
Since we use %g5 itself as a temporary, it can get clobbered if we take an interrupt mid-stream and thus cause end up with the final %g5 value too early as a result of rtrap processing. Set %g5 at the very end, atomically, to avoid this problem. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/rtrap.S')
-rw-r--r--arch/sparc64/kernel/rtrap.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sparc64/kernel/rtrap.S b/arch/sparc64/kernel/rtrap.S
index 89794ebdcbcf..64bc03610bc6 100644
--- a/arch/sparc64/kernel/rtrap.S
+++ b/arch/sparc64/kernel/rtrap.S
@@ -226,7 +226,7 @@ rt_continue: ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1
226 brz,pt %l3, 1f 226 brz,pt %l3, 1f
227 nop 227 nop
228 /* Must do this before thread reg is clobbered below. */ 228 /* Must do this before thread reg is clobbered below. */
229 LOAD_PER_CPU_BASE(%g6, %g7) 229 LOAD_PER_CPU_BASE(%i0, %i1, %i2)
2301: 2301:
231 ldx [%sp + PTREGS_OFF + PT_V9_G6], %g6 231 ldx [%sp + PTREGS_OFF + PT_V9_G6], %g6
232 ldx [%sp + PTREGS_OFF + PT_V9_G7], %g7 232 ldx [%sp + PTREGS_OFF + PT_V9_G7], %g7