diff options
author | David S. Miller <davem@sunset.davemloft.net> | 2007-05-09 05:35:27 -0400 |
---|---|---|
committer | David S. Miller <davem@sunset.davemloft.net> | 2007-05-09 05:35:27 -0400 |
commit | ca3dd88e411648c76e1911a729440e3763ba5049 (patch) | |
tree | e874ed0c1e91269aa514a443358d4f3738bcb244 /arch/sparc64/kernel/pci_sun4v.c | |
parent | de372ecd80a42c4fb485c7232475301a18d05184 (diff) |
[SPARC64] PCI: Consolidate PCI access code into pci_common.c
All the sun4u controllers do the same thing to compute the physical
I/O address to poke, and we can move the sun4v code into this common
location too.
This one needs a bit of testing, in particular the Sabre code had some
funny stuff that would break up u16 and/or u32 accesses into pieces
and I didn't think that was needed any more. If it is we need to find
out why and add back code to do it again.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/pci_sun4v.c')
-rw-r--r-- | arch/sparc64/kernel/pci_sun4v.c | 86 |
1 files changed, 2 insertions, 84 deletions
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c index 0c76a8891a96..34df4047587a 100644 --- a/arch/sparc64/kernel/pci_sun4v.c +++ b/arch/sparc64/kernel/pci_sun4v.c | |||
@@ -593,89 +593,6 @@ const struct pci_iommu_ops pci_sun4v_iommu_ops = { | |||
593 | .dma_sync_sg_for_cpu = pci_4v_dma_sync_sg_for_cpu, | 593 | .dma_sync_sg_for_cpu = pci_4v_dma_sync_sg_for_cpu, |
594 | }; | 594 | }; |
595 | 595 | ||
596 | static inline int pci_sun4v_out_of_range(struct pci_pbm_info *pbm, unsigned int bus, unsigned int device, unsigned int func) | ||
597 | { | ||
598 | if (bus < pbm->pci_first_busno || | ||
599 | bus > pbm->pci_last_busno) | ||
600 | return 1; | ||
601 | return 0; | ||
602 | } | ||
603 | |||
604 | static int pci_sun4v_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, | ||
605 | int where, int size, u32 *value) | ||
606 | { | ||
607 | struct pci_pbm_info *pbm = bus_dev->sysdata; | ||
608 | u32 devhandle = pbm->devhandle; | ||
609 | unsigned int bus = bus_dev->number; | ||
610 | unsigned int device = PCI_SLOT(devfn); | ||
611 | unsigned int func = PCI_FUNC(devfn); | ||
612 | unsigned long ret; | ||
613 | |||
614 | if (bus_dev == pbm->pci_bus && devfn == 0x00) | ||
615 | return pci_host_bridge_read_pci_cfg(bus_dev, devfn, where, | ||
616 | size, value); | ||
617 | if (pci_sun4v_out_of_range(pbm, bus, device, func)) { | ||
618 | ret = ~0UL; | ||
619 | } else { | ||
620 | ret = pci_sun4v_config_get(devhandle, | ||
621 | HV_PCI_DEVICE_BUILD(bus, device, func), | ||
622 | where, size); | ||
623 | #if 0 | ||
624 | printk("rcfg: [%x:%x:%x:%d]=[%lx]\n", | ||
625 | devhandle, HV_PCI_DEVICE_BUILD(bus, device, func), | ||
626 | where, size, ret); | ||
627 | #endif | ||
628 | } | ||
629 | switch (size) { | ||
630 | case 1: | ||
631 | *value = ret & 0xff; | ||
632 | break; | ||
633 | case 2: | ||
634 | *value = ret & 0xffff; | ||
635 | break; | ||
636 | case 4: | ||
637 | *value = ret & 0xffffffff; | ||
638 | break; | ||
639 | }; | ||
640 | |||
641 | |||
642 | return PCIBIOS_SUCCESSFUL; | ||
643 | } | ||
644 | |||
645 | static int pci_sun4v_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, | ||
646 | int where, int size, u32 value) | ||
647 | { | ||
648 | struct pci_pbm_info *pbm = bus_dev->sysdata; | ||
649 | u32 devhandle = pbm->devhandle; | ||
650 | unsigned int bus = bus_dev->number; | ||
651 | unsigned int device = PCI_SLOT(devfn); | ||
652 | unsigned int func = PCI_FUNC(devfn); | ||
653 | unsigned long ret; | ||
654 | |||
655 | if (bus_dev == pbm->pci_bus && devfn == 0x00) | ||
656 | return pci_host_bridge_write_pci_cfg(bus_dev, devfn, where, | ||
657 | size, value); | ||
658 | if (pci_sun4v_out_of_range(pbm, bus, device, func)) { | ||
659 | /* Do nothing. */ | ||
660 | } else { | ||
661 | ret = pci_sun4v_config_put(devhandle, | ||
662 | HV_PCI_DEVICE_BUILD(bus, device, func), | ||
663 | where, size, value); | ||
664 | #if 0 | ||
665 | printk("wcfg: [%x:%x:%x:%d] v[%x] == [%lx]\n", | ||
666 | devhandle, HV_PCI_DEVICE_BUILD(bus, device, func), | ||
667 | where, size, value, ret); | ||
668 | #endif | ||
669 | } | ||
670 | return PCIBIOS_SUCCESSFUL; | ||
671 | } | ||
672 | |||
673 | static struct pci_ops pci_sun4v_ops = { | ||
674 | .read = pci_sun4v_read_pci_cfg, | ||
675 | .write = pci_sun4v_write_pci_cfg, | ||
676 | }; | ||
677 | |||
678 | |||
679 | static void pci_sun4v_scan_bus(struct pci_pbm_info *pbm) | 596 | static void pci_sun4v_scan_bus(struct pci_pbm_info *pbm) |
680 | { | 597 | { |
681 | struct property *prop; | 598 | struct property *prop; |
@@ -1238,7 +1155,8 @@ static void pci_sun4v_pbm_init(struct pci_controller_info *p, struct device_node | |||
1238 | pci_pbm_root = pbm; | 1155 | pci_pbm_root = pbm; |
1239 | 1156 | ||
1240 | pbm->scan_bus = pci_sun4v_scan_bus; | 1157 | pbm->scan_bus = pci_sun4v_scan_bus; |
1241 | pbm->pci_ops = &pci_sun4v_ops; | 1158 | pbm->pci_ops = &sun4v_pci_ops; |
1159 | pbm->config_space_reg_bits = 12; | ||
1242 | 1160 | ||
1243 | pbm->index = pci_num_pbms++; | 1161 | pbm->index = pci_num_pbms++; |
1244 | 1162 | ||