[SPARC64]: Fix new context version SMP handling.

Don't piggy back the SMP receive signal code to do the
context version change handling.

Instead allocate another fixed PIL number for this
asynchronous cross-call.  We can't use smp_call_function()
because this thing is invoked with interrupts disabled
and a few spinlocks held.

Also, fix smp_call_function_mask() to count "cpus" correctly.
There is no guarentee that the local cpu is in the mask
yet that is exactly what this code was assuming.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 7 insertions, 7 deletions

diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index 5ddc92931976..f67bb7f078cf 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -533,17 +533,17 @@ static unsigned char sabre_pil_table[] = {
 /*0x14*/0, 0, 0, 0,     /* PCI B slot 1  Int A, B, C, D */
 /*0x18*/0, 0, 0, 0,     /* PCI B slot 2  Int A, B, C, D */
 /*0x1c*/0, 0, 0, 0,     /* PCI B slot 3  Int A, B, C, D */
-/*0x20*/4,              /* SCSI                         */
+/*0x20*/5,              /* SCSI                         */
 /*0x21*/5,              /* Ethernet                     */
 /*0x22*/8,              /* Parallel Port                */
 /*0x23*/13,             /* Audio Record                 */
 /*0x24*/14,             /* Audio Playback               */
 /*0x25*/15,             /* PowerFail                    */
-/*0x26*/4,              /* second SCSI                  */
+/*0x26*/5,              /* second SCSI                  */
 /*0x27*/11,             /* Floppy                       */
-/*0x28*/4,              /* Spare Hardware               */
+/*0x28*/5,              /* Spare Hardware               */
 /*0x29*/9,              /* Keyboard                     */
-/*0x2a*/4,              /* Mouse                        */
+/*0x2a*/5,              /* Mouse                        */
 /*0x2b*/12,             /* Serial                       */
 /*0x2c*/10,             /* Timer 0                      */
 /*0x2d*/11,             /* Timer 1                      */
@@ -565,11 +565,11 @@ static int sabre_ino_to_pil(struct pci_dev *pdev, unsigned int ino)
 
         ret = sabre_pil_table[ino];
         if (ret == 0 && pdev == NULL) {
-                ret = 4;
+                ret = 5;
         } else if (ret == 0) {
                 switch ((pdev->class >> 16) & 0xff) {
                 case PCI_BASE_CLASS_STORAGE:
-                        ret = 4;
+                        ret = 5;
                         break;
 
                 case PCI_BASE_CLASS_NETWORK:
@@ -588,7 +588,7 @@ static int sabre_ino_to_pil(struct pci_dev *pdev, unsigned int ino)
                         break;
 
                 default:
-                        ret = 4;
+                        ret = 5;
                         break;
                 };
         }