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authorDavid S. Miller <davem@davemloft.net>2006-06-20 04:22:35 -0400
committerDavid S. Miller <davem@davemloft.net>2006-06-20 04:22:35 -0400
commit8047e247c899f80c33a23ad7e9e250224f0d26a5 (patch)
tree253a7ba3c902730928214df5c2b5630d7875cc11 /arch/sparc64/kernel/pci_sabre.c
parent37cdcd9e82108f9b899f1631f66ade2e45738a6e (diff)
[SPARC64]: Virtualize IRQ numbers.
Inspired by PowerPC XICS interrupt support code. All IRQs are virtualized in order to keep NR_IRQS from needing to be too large. Interrupts on sparc64 are arbitrary 11-bit values, but we don't need to define NR_IRQS to 2048 if we virtualize the IRQs. As PCI and SBUS controller drivers build device IRQs, we divy out virtual IRQ numbers incrementally starting at 1. Zero is a special virtual IRQ used for the timer interrupt. So device drivers all see virtual IRQs, and all the normal interfaces such as request_irq(), enable_irq(), etc. translate that into a real IRQ number in order to configure the IRQ. At this point knowledge of the struct ino_bucket is almost entirely contained within arch/sparc64/kernel/irq.c There are a few small bits in the PCI controller drivers that need to be swept away before we can remove ino_bucket's definition out of asm-sparc64/irq.h and privately into kernel/irq.c Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/pci_sabre.c')
-rw-r--r--arch/sparc64/kernel/pci_sabre.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index caa7aeed5d14..846c1205aa9a 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -544,10 +544,10 @@ static unsigned int sabre_irq_build(struct pci_pbm_info *pbm,
544 struct pci_dev *pdev, 544 struct pci_dev *pdev,
545 unsigned int ino) 545 unsigned int ino)
546{ 546{
547 struct ino_bucket *bucket;
548 unsigned long imap, iclr; 547 unsigned long imap, iclr;
549 unsigned long imap_off, iclr_off; 548 unsigned long imap_off, iclr_off;
550 int inofixup = 0; 549 int inofixup = 0;
550 int virt_irq;
551 551
552 ino &= PCI_IRQ_INO; 552 ino &= PCI_IRQ_INO;
553 if (ino < SABRE_ONBOARD_IRQ_BASE) { 553 if (ino < SABRE_ONBOARD_IRQ_BASE) {
@@ -573,23 +573,23 @@ static unsigned int sabre_irq_build(struct pci_pbm_info *pbm,
573 if ((ino & 0x20) == 0) 573 if ((ino & 0x20) == 0)
574 inofixup = ino & 0x03; 574 inofixup = ino & 0x03;
575 575
576 bucket = __bucket(build_irq(inofixup, iclr, imap)); 576 virt_irq = build_irq(inofixup, iclr, imap, IBF_PCI);
577 bucket->flags |= IBF_PCI;
578 577
579 if (pdev) { 578 if (pdev) {
580 struct pcidev_cookie *pcp = pdev->sysdata; 579 struct pcidev_cookie *pcp = pdev->sysdata;
581 580
582 if (pdev->bus->number != pcp->pbm->pci_first_busno) { 581 if (pdev->bus->number != pcp->pbm->pci_first_busno) {
583 struct pci_controller_info *p = pcp->pbm->parent; 582 struct pci_controller_info *p = pcp->pbm->parent;
584 struct irq_desc *d = bucket->irq_info;
585 583
586 d->pre_handler = sabre_wsync_handler; 584 irq_install_pre_handler(virt_irq,
587 d->pre_handler_arg1 = pdev; 585 sabre_wsync_handler,
588 d->pre_handler_arg2 = (void *) 586 pdev,
589 p->pbm_A.controller_regs + SABRE_WRSYNC; 587 (void *)
588 p->pbm_A.controller_regs +
589 SABRE_WRSYNC);
590 } 590 }
591 } 591 }
592 return __irq(bucket); 592 return virt_irq;
593} 593}
594 594
595/* SABRE error handling support. */ 595/* SABRE error handling support. */