[SPARC64]: Fix conflicts in SBUS/PCI/EBUS/ISA DMA handling.

Fully unify all of the DMA ops so that subordinate bus types to
the DMA operation providers (such as ebus, isa, of_device) can
work transparently.

Basically, we just make sure that for every system device we
create, the dev->archdata 'iommu' and 'stc' fields are filled
in.

Then we have two platform variants of the DMA ops, one for SUN4U which
actually programs the real hardware, and one for SUN4V which makes
hypervisor calls.

This also fixes the crashes in parport_pc on sparc64, reported by
Meelis Roos.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 16 insertions, 8 deletions

diff --git a/arch/sparc64/kernel/pci_fire.c b/arch/sparc64/kernel/pci_fire.c
index 7f5d473901c4..14d67fe21ab2 100644
--- a/arch/sparc64/kernel/pci_fire.c
+++ b/arch/sparc64/kernel/pci_fire.c
@@ -39,12 +39,12 @@ static void pci_fire_scan_bus(struct pci_pbm_info *pbm)
 #define FIRE_IOMMU_FLUSH        0x40100UL
 #define FIRE_IOMMU_FLUSHINV     0x40108UL
 
-static void pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm)
+static int pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm)
 {
         struct iommu *iommu = pbm->iommu;
         u32 vdma[2], dma_mask;
         u64 control;
-        int tsbsize;
+        int tsbsize, err;
 
         /* No virtual-dma property on these guys, use largest size.  */
         vdma[0] = 0xc0000000; /* base */
@@ -68,7 +68,9 @@ static void pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm)
          */
         fire_write(iommu->iommu_flushinv, ~(u64)0);
 
-        pci_iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask);
+        err = iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask);
+        if (err)
+                return err;
 
         fire_write(iommu->iommu_tsbbase, __pa(iommu->page_table) | 0x7UL);
 
@@ -78,6 +80,8 @@ static void pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm)
                     0x00000002 /* Bypass enable */              |
                     0x00000001 /* Translation enable */);
         fire_write(iommu->iommu_control, control);
+
+        return 0;
 }
 
 /* Based at pbm->controller_regs */
@@ -167,8 +171,8 @@ static void pci_fire_hw_init(struct pci_pbm_info *pbm)
         fire_write(pbm->pbm_regs + FIRE_PEC_IENAB, ~(u64)0);
 }
 
-static void pci_fire_pbm_init(struct pci_controller_info *p,
-                              struct device_node *dp, u32 portid)
+static int pci_fire_pbm_init(struct pci_controller_info *p,
+                             struct device_node *dp, u32 portid)
 {
         const struct linux_prom64_registers *regs;
         struct pci_pbm_info *pbm;
@@ -203,7 +207,8 @@ static void pci_fire_pbm_init(struct pci_controller_info *p,
         pci_get_pbm_props(pbm);
 
         pci_fire_hw_init(pbm);
-        pci_fire_pbm_iommu_init(pbm);
+
+        return pci_fire_pbm_iommu_init(pbm);
 }
 
 static inline int portid_compare(u32 x, u32 y)
@@ -222,7 +227,8 @@ void fire_pci_init(struct device_node *dp, const char *model_name)
 
         for (pbm = pci_pbm_root; pbm; pbm = pbm->next) {
                 if (portid_compare(pbm->portid, portid)) {
-                        pci_fire_pbm_init(pbm->parent, dp, portid);
+                        if (pci_fire_pbm_init(pbm->parent, dp, portid))
+                                goto fatal_memory_error;
                         return;
                 }
         }
@@ -250,7 +256,9 @@ void fire_pci_init(struct device_node *dp, const char *model_name)
          */
         pci_memspace_mask = 0x7fffffffUL;
 
-        pci_fire_pbm_init(p, dp, portid);
+        if (pci_fire_pbm_init(p, dp, portid))
+                goto fatal_memory_error;
+
         return;
 
 fatal_memory_error: