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authorDavid S. Miller <davem@sunset.davemloft.net>2007-07-26 02:30:16 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-07-30 03:27:29 -0400
commita2d6ea0180531b5ace2dc1e64b6e22465ed51267 (patch)
tree773600077d9575059878e880311e41a3184e52a2 /arch/sparc64/kernel/pci.c
parentb84d879639f83d35d3fcd909222522c928bf974b (diff)
[SPARC64]: Fix sun4u PCI config space accesses on sun4u.
Don't provide fake PCI config space for sun4u. Also, put back the funny host controller space handling that at least Sabre needs. You have to read PCI host controller registers at their nature size otherwise you get zeros instead of correct values. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/pci.c')
-rw-r--r--arch/sparc64/kernel/pci.c15
1 files changed, 10 insertions, 5 deletions
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index 55ad1b899bb8..77449a005752 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -422,10 +422,15 @@ struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
422 dev->multifunction = 0; /* maybe a lie? */ 422 dev->multifunction = 0; /* maybe a lie? */
423 423
424 if (host_controller) { 424 if (host_controller) {
425 dev->vendor = 0x108e; 425 if (tlb_type != hypervisor) {
426 dev->device = 0x8000; 426 pci_read_config_word(dev, PCI_VENDOR_ID,
427 dev->subsystem_vendor = 0x0000; 427 &dev->vendor);
428 dev->subsystem_device = 0x0000; 428 pci_read_config_word(dev, PCI_DEVICE_ID,
429 &dev->device);
430 } else {
431 dev->vendor = PCI_VENDOR_ID_SUN;
432 dev->device = 0x80f0;
433 }
429 dev->cfg_size = 256; 434 dev->cfg_size = 256;
430 dev->class = PCI_CLASS_BRIDGE_HOST << 8; 435 dev->class = PCI_CLASS_BRIDGE_HOST << 8;
431 sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus), 436 sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus),
@@ -818,7 +823,7 @@ int pci_host_bridge_read_pci_cfg(struct pci_bus *bus_dev,
818{ 823{
819 static u8 fake_pci_config[] = { 824 static u8 fake_pci_config[] = {
820 0x8e, 0x10, /* Vendor: 0x108e (Sun) */ 825 0x8e, 0x10, /* Vendor: 0x108e (Sun) */
821 0x00, 0x80, /* Device: 0x8000 (PBM) */ 826 0xf0, 0x80, /* Device: 0x80f0 (Fire) */
822 0x46, 0x01, /* Command: 0x0146 (SERR, PARITY, MASTER, MEM) */ 827 0x46, 0x01, /* Command: 0x0146 (SERR, PARITY, MASTER, MEM) */
823 0xa0, 0x22, /* Status: 0x02a0 (DEVSEL_MED, FB2B, 66MHZ) */ 828 0xa0, 0x22, /* Status: 0x02a0 (DEVSEL_MED, FB2B, 66MHZ) */
824 0x00, 0x00, 0x00, 0x06, /* Class: 0x06000000 host bridge */ 829 0x00, 0x00, 0x00, 0x06, /* Class: 0x06000000 host bridge */