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authorDavid S. Miller <davem@davemloft.net>2006-06-20 04:23:32 -0400
committerDavid S. Miller <davem@davemloft.net>2006-06-20 04:23:32 -0400
commite18e2a00efc8352c131eb8d5a460149fb5776f1c (patch)
treebee6e965d77f4289c37300714d7976c3e19f2994 /arch/sparc64/kernel/pci.c
parent8047e247c899f80c33a23ad7e9e250224f0d26a5 (diff)
[SPARC64]: Move over to GENERIC_HARDIRQS.
This is the long overdue conversion of sparc64 over to the generic IRQ layer. The kernel image is slightly larger, but the BSS is ~60K smaller due to the reduced size of struct ino_bucket. A lot of IRQ implementation details, including ino_bucket, were moved out of asm-sparc64/irq.h and are now private to arch/sparc64/kernel/irq.c, and most of the code in irq.c totally disappeared. One thing that's different at the moment is IRQ distribution, we do it at enable_irq() time. If the cpu mask is ALL then we round-robin using a global rotating cpu counter, else we pick the first cpu in the mask to support single cpu targetting. This is similar to what powerpc's XICS IRQ support code does. This works fine on my UP SB1000, and the SMP build goes fine and runs on that machine, but lots of testing on different setups is needed. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/pci.c')
-rw-r--r--arch/sparc64/kernel/pci.c38
1 files changed, 0 insertions, 38 deletions
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index f97ddeb105ac..9472580a4319 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -47,12 +47,6 @@ struct pci_controller_info *pci_controller_root = NULL;
47/* Each PCI controller found gets a unique index. */ 47/* Each PCI controller found gets a unique index. */
48int pci_num_controllers = 0; 48int pci_num_controllers = 0;
49 49
50/* At boot time the user can give the kernel a command
51 * line option which controls if and how PCI devices
52 * are reordered at PCI bus probing time.
53 */
54int pci_device_reorder = 0;
55
56volatile int pci_poke_in_progress; 50volatile int pci_poke_in_progress;
57volatile int pci_poke_cpu = -1; 51volatile int pci_poke_cpu = -1;
58volatile int pci_poke_faulted; 52volatile int pci_poke_faulted;
@@ -316,27 +310,6 @@ static void __init pci_scan_each_controller_bus(void)
316 p->scan_bus(p); 310 p->scan_bus(p);
317} 311}
318 312
319/* Reorder the pci_dev chain, so that onboard devices come first
320 * and then come the pluggable cards.
321 */
322static void __init pci_reorder_devs(void)
323{
324 struct list_head *pci_onboard = &pci_devices;
325 struct list_head *walk = pci_onboard->next;
326
327 while (walk != pci_onboard) {
328 struct pci_dev *pdev = pci_dev_g(walk);
329 struct list_head *walk_next = walk->next;
330
331 if (pdev->irq && (__irq_ino(pdev->irq) & 0x20)) {
332 list_del(walk);
333 list_add(walk, pci_onboard);
334 }
335
336 walk = walk_next;
337 }
338}
339
340extern void clock_probe(void); 313extern void clock_probe(void);
341extern void power_init(void); 314extern void power_init(void);
342 315
@@ -348,9 +321,6 @@ static int __init pcibios_init(void)
348 321
349 pci_scan_each_controller_bus(); 322 pci_scan_each_controller_bus();
350 323
351 if (pci_device_reorder)
352 pci_reorder_devs();
353
354 isa_init(); 324 isa_init();
355 ebus_init(); 325 ebus_init();
356 clock_probe(); 326 clock_probe();
@@ -441,14 +411,6 @@ EXPORT_SYMBOL(pcibios_bus_to_resource);
441 411
442char * __init pcibios_setup(char *str) 412char * __init pcibios_setup(char *str)
443{ 413{
444 if (!strcmp(str, "onboardfirst")) {
445 pci_device_reorder = 1;
446 return NULL;
447 }
448 if (!strcmp(str, "noreorder")) {
449 pci_device_reorder = 0;
450 return NULL;
451 }
452 return str; 414 return str;
453} 415}
454 416