sparc64: Split entry.S up into seperate files.

entry.S was a hodge-podge of several totally unrelated
sets of assembler routines, ranging from FPU trap handlers
to hypervisor call functions.

Split it up into topic-sized pieces.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 87 insertions, 0 deletions

diff --git a/arch/sparc64/kernel/misctrap.S b/arch/sparc64/kernel/misctrap.S
new file mode 100644
index 000000000000..b257497ddde1
--- /dev/null
+++ b/arch/sparc64/kernel/misctrap.S
@@ -0,0 +1,87 @@
+        .type           __do_privact,#function
+__do_privact:
+        mov             TLB_SFSR, %g3
+        stxa            %g0, [%g3] ASI_DMMU     ! Clear FaultValid bit
+        membar          #Sync
+        sethi           %hi(109f), %g7
+        ba,pt           %xcc, etrap
+109:    or              %g7, %lo(109b), %g7
+        call            do_privact
+         add            %sp, PTREGS_OFF, %o0
+        ba,pt           %xcc, rtrap
+         nop
+        .size           __do_privact,.-__do_privact
+
+        .type           do_mna,#function
+do_mna:
+        rdpr            %tl, %g3
+        cmp             %g3, 1
+
+        /* Setup %g4/%g5 now as they are used in the
+         * winfixup code.
+         */
+        mov             TLB_SFSR, %g3
+        mov             DMMU_SFAR, %g4
+        ldxa            [%g4] ASI_DMMU, %g4
+        ldxa            [%g3] ASI_DMMU, %g5
+        stxa            %g0, [%g3] ASI_DMMU     ! Clear FaultValid bit
+        membar          #Sync
+        bgu,pn          %icc, winfix_mna
+         rdpr           %tpc, %g3
+
+1:      sethi           %hi(109f), %g7
+        ba,pt           %xcc, etrap
+109:     or             %g7, %lo(109b), %g7
+        mov             %l4, %o1
+        mov             %l5, %o2
+        call            mem_address_unaligned
+         add            %sp, PTREGS_OFF, %o0
+        ba,pt           %xcc, rtrap
+         nop
+        .size           do_mna,.-do_mna
+
+        .type           do_lddfmna,#function
+do_lddfmna:
+        sethi           %hi(109f), %g7
+        mov             TLB_SFSR, %g4
+        ldxa            [%g4] ASI_DMMU, %g5
+        stxa            %g0, [%g4] ASI_DMMU     ! Clear FaultValid bit
+        membar          #Sync
+        mov             DMMU_SFAR, %g4
+        ldxa            [%g4] ASI_DMMU, %g4
+        ba,pt           %xcc, etrap
+109:     or             %g7, %lo(109b), %g7
+        mov             %l4, %o1
+        mov             %l5, %o2
+        call            handle_lddfmna
+         add            %sp, PTREGS_OFF, %o0
+        ba,pt           %xcc, rtrap
+         nop
+        .size           do_lddfmna,.-do_lddfmna
+
+        .type           do_stdfmna,#function
+do_stdfmna:
+        sethi           %hi(109f), %g7
+        mov             TLB_SFSR, %g4
+        ldxa            [%g4] ASI_DMMU, %g5
+        stxa            %g0, [%g4] ASI_DMMU     ! Clear FaultValid bit
+        membar          #Sync
+        mov             DMMU_SFAR, %g4
+        ldxa            [%g4] ASI_DMMU, %g4
+        ba,pt           %xcc, etrap
+109:     or             %g7, %lo(109b), %g7
+        mov             %l4, %o1
+        mov             %l5, %o2
+        call            handle_stdfmna
+         add            %sp, PTREGS_OFF, %o0
+        ba,pt           %xcc, rtrap
+         nop
+        .size           do_stdfmna,.-do_stdfmna
+
+        .type           breakpoint_trap,#function
+breakpoint_trap:
+        call            sparc_breakpoint
+         add            %sp, PTREGS_OFF, %o0
+        ba,pt           %xcc, rtrap
+         nop
+        .size           breakpoint_trap,.-breakpoint_trap