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authorDavid S. Miller <davem@sunset.davemloft.net>2006-02-09 05:52:44 -0500
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 04:12:03 -0500
commitd82ace7dc4073b090a55b9740700e32b9a9ae302 (patch)
treed5aa8e10664b05bbfe31eacf95e2066c03cab102 /arch/sparc64/kernel/irq.c
parent1d2f1f90a1e004b0c1b8a73ed4394a93f09104b3 (diff)
[SPARC64]: Detect sun4v early in boot process.
We look for "SUNW,sun4v" in the 'compatible' property of the root OBP device tree node. Protect every %ver register access, to make sure it is not touched on sun4v, as %ver is hyperprivileged there. Lock kernel TLB entries using hypervisor calls instead of calls into OBP. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/irq.c')
-rw-r--r--arch/sparc64/kernel/irq.c78
1 files changed, 42 insertions, 36 deletions
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c
index c80d2531ec46..1f6455503f24 100644
--- a/arch/sparc64/kernel/irq.c
+++ b/arch/sparc64/kernel/irq.c
@@ -150,47 +150,53 @@ void enable_irq(unsigned int irq)
150 150
151 preempt_disable(); 151 preempt_disable();
152 152
153 if (tlb_type == cheetah || tlb_type == cheetah_plus) { 153 if (tlb_type == hypervisor) {
154 unsigned long ver; 154 /* XXX SUN4V: implement me... XXX */
155 155 } else {
156 __asm__ ("rdpr %%ver, %0" : "=r" (ver)); 156 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
157 if ((ver >> 32) == __JALAPENO_ID || 157 unsigned long ver;
158 (ver >> 32) == __SERRANO_ID) { 158
159 /* We set it to our JBUS ID. */ 159 __asm__ ("rdpr %%ver, %0" : "=r" (ver));
160 if ((ver >> 32) == __JALAPENO_ID ||
161 (ver >> 32) == __SERRANO_ID) {
162 /* We set it to our JBUS ID. */
163 __asm__ __volatile__("ldxa [%%g0] %1, %0"
164 : "=r" (tid)
165 : "i" (ASI_JBUS_CONFIG));
166 tid = ((tid & (0x1fUL<<17)) << 9);
167 tid &= IMAP_TID_JBUS;
168 } else {
169 /* We set it to our Safari AID. */
170 __asm__ __volatile__("ldxa [%%g0] %1, %0"
171 : "=r" (tid)
172 : "i"(ASI_SAFARI_CONFIG));
173 tid = ((tid & (0x3ffUL<<17)) << 9);
174 tid &= IMAP_AID_SAFARI;
175 }
176 } else if (this_is_starfire == 0) {
177 /* We set it to our UPA MID. */
160 __asm__ __volatile__("ldxa [%%g0] %1, %0" 178 __asm__ __volatile__("ldxa [%%g0] %1, %0"
161 : "=r" (tid) 179 : "=r" (tid)
162 : "i" (ASI_JBUS_CONFIG)); 180 : "i" (ASI_UPA_CONFIG));
163 tid = ((tid & (0x1fUL<<17)) << 9); 181 tid = ((tid & UPA_CONFIG_MID) << 9);
164 tid &= IMAP_TID_JBUS; 182 tid &= IMAP_TID_UPA;
165 } else { 183 } else {
166 /* We set it to our Safari AID. */ 184 tid = (starfire_translate(imap,
167 __asm__ __volatile__("ldxa [%%g0] %1, %0" 185 smp_processor_id()) << 26);
168 : "=r" (tid) 186 tid &= IMAP_TID_UPA;
169 : "i" (ASI_SAFARI_CONFIG));
170 tid = ((tid & (0x3ffUL<<17)) << 9);
171 tid &= IMAP_AID_SAFARI;
172 } 187 }
173 } else if (this_is_starfire == 0) {
174 /* We set it to our UPA MID. */
175 __asm__ __volatile__("ldxa [%%g0] %1, %0"
176 : "=r" (tid)
177 : "i" (ASI_UPA_CONFIG));
178 tid = ((tid & UPA_CONFIG_MID) << 9);
179 tid &= IMAP_TID_UPA;
180 } else {
181 tid = (starfire_translate(imap, smp_processor_id()) << 26);
182 tid &= IMAP_TID_UPA;
183 }
184 188
185 /* NOTE NOTE NOTE, IGN and INO are read-only, IGN is a product 189 /* NOTE NOTE NOTE, IGN and INO are read-only, IGN is a product
186 * of this SYSIO's preconfigured IGN in the SYSIO Control 190 * of this SYSIO's preconfigured IGN in the SYSIO Control
187 * Register, the hardware just mirrors that value here. 191 * Register, the hardware just mirrors that value here.
188 * However for Graphics and UPA Slave devices the full 192 * However for Graphics and UPA Slave devices the full
189 * IMAP_INR field can be set by the programmer here. 193 * IMAP_INR field can be set by the programmer here.
190 * 194 *
191 * Things like FFB can now be handled via the new IRQ mechanism. 195 * Things like FFB can now be handled via the new IRQ
192 */ 196 * mechanism.
193 upa_writel(tid | IMAP_VALID, imap); 197 */
198 upa_writel(tid | IMAP_VALID, imap);
199 }
194 200
195 preempt_enable(); 201 preempt_enable();
196} 202}