diff options
author | David S. Miller <davem@sunset.davemloft.net> | 2007-09-16 14:51:15 -0400 |
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committer | David S. Miller <davem@sunset.davemloft.net> | 2007-09-16 14:51:15 -0400 |
commit | 301feb652441a7168b59256fc44918075dcab0d5 (patch) | |
tree | 68721bebf1375659be165c4810bb439785d6e96f /arch/sparc64/kernel/head.S | |
parent | 58ea1aa07e3cb4674ab0261b45aa1ba68282a79d (diff) |
[SPARC64]: Fix lockdep, particularly on SMP.
As noted by Al Viro, when we try to call prom_set_trap_table()
in the SMP trampoline code we try to take the PROM call spinlock
which doesn't work because the current thread pointer isn't
valid yet and lockdep depends upon that being correct.
Furthermore, we cannot set the current thread pointer register
because it can't be properly dereferenced until we return from
prom_set_trap_table(). Kernel TLB misses only work after that
call.
So do the PROM call to set the trap table directly instead of
going through the OBP library C code, and thus avoid the lock
altogether.
These calls are guarenteed to be serialized fully.
Since there are now no calls to the prom_set_trap_table{_sun4v}()
library functions, they can be deleted.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/head.S')
-rw-r--r-- | arch/sparc64/kernel/head.S | 35 |
1 files changed, 30 insertions, 5 deletions
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S index 63144ad476f6..c4147ad8677b 100644 --- a/arch/sparc64/kernel/head.S +++ b/arch/sparc64/kernel/head.S | |||
@@ -98,7 +98,7 @@ sparc64_boot: | |||
98 | .globl prom_boot_mapped_pc, prom_boot_mapping_mode | 98 | .globl prom_boot_mapped_pc, prom_boot_mapping_mode |
99 | .globl prom_boot_mapping_phys_high, prom_boot_mapping_phys_low | 99 | .globl prom_boot_mapping_phys_high, prom_boot_mapping_phys_low |
100 | .globl prom_compatible_name, prom_cpu_path, prom_cpu_compatible | 100 | .globl prom_compatible_name, prom_cpu_path, prom_cpu_compatible |
101 | .globl is_sun4v, sun4v_chip_type | 101 | .globl is_sun4v, sun4v_chip_type, prom_set_trap_table_name |
102 | prom_peer_name: | 102 | prom_peer_name: |
103 | .asciz "peer" | 103 | .asciz "peer" |
104 | prom_compatible_name: | 104 | prom_compatible_name: |
@@ -121,6 +121,8 @@ prom_map_name: | |||
121 | .asciz "map" | 121 | .asciz "map" |
122 | prom_unmap_name: | 122 | prom_unmap_name: |
123 | .asciz "unmap" | 123 | .asciz "unmap" |
124 | prom_set_trap_table_name: | ||
125 | .asciz "SUNW,set-trap-table" | ||
124 | prom_sun4v_name: | 126 | prom_sun4v_name: |
125 | .asciz "sun4v" | 127 | .asciz "sun4v" |
126 | prom_niagara_prefix: | 128 | prom_niagara_prefix: |
@@ -691,15 +693,38 @@ setup_trap_table: | |||
691 | sethi %hi(kern_base), %g3 | 693 | sethi %hi(kern_base), %g3 |
692 | ldx [%g3 + %lo(kern_base)], %g3 | 694 | ldx [%g3 + %lo(kern_base)], %g3 |
693 | add %g2, %g3, %o1 | 695 | add %g2, %g3, %o1 |
696 | sethi %hi(sparc64_ttable_tl0), %o0 | ||
694 | 697 | ||
695 | call prom_set_trap_table_sun4v | 698 | set prom_set_trap_table_name, %g2 |
696 | sethi %hi(sparc64_ttable_tl0), %o0 | 699 | stx %g2, [%sp + 2047 + 128 + 0x00] |
700 | mov 2, %g2 | ||
701 | stx %g2, [%sp + 2047 + 128 + 0x08] | ||
702 | mov 0, %g2 | ||
703 | stx %g2, [%sp + 2047 + 128 + 0x10] | ||
704 | stx %o0, [%sp + 2047 + 128 + 0x18] | ||
705 | stx %o1, [%sp + 2047 + 128 + 0x20] | ||
706 | sethi %hi(p1275buf), %g2 | ||
707 | or %g2, %lo(p1275buf), %g2 | ||
708 | ldx [%g2 + 0x08], %o1 | ||
709 | call %o1 | ||
710 | add %sp, (2047 + 128), %o0 | ||
697 | 711 | ||
698 | ba,pt %xcc, 2f | 712 | ba,pt %xcc, 2f |
699 | nop | 713 | nop |
700 | 714 | ||
701 | 1: call prom_set_trap_table | 715 | 1: sethi %hi(sparc64_ttable_tl0), %o0 |
702 | sethi %hi(sparc64_ttable_tl0), %o0 | 716 | set prom_set_trap_table_name, %g2 |
717 | stx %g2, [%sp + 2047 + 128 + 0x00] | ||
718 | mov 1, %g2 | ||
719 | stx %g2, [%sp + 2047 + 128 + 0x08] | ||
720 | mov 0, %g2 | ||
721 | stx %g2, [%sp + 2047 + 128 + 0x10] | ||
722 | stx %o0, [%sp + 2047 + 128 + 0x18] | ||
723 | sethi %hi(p1275buf), %g2 | ||
724 | or %g2, %lo(p1275buf), %g2 | ||
725 | ldx [%g2 + 0x08], %o1 | ||
726 | call %o1 | ||
727 | add %sp, (2047 + 128), %o0 | ||
703 | 728 | ||
704 | /* Start using proper page size encodings in ctx register. */ | 729 | /* Start using proper page size encodings in ctx register. */ |
705 | 2: sethi %hi(sparc64_kern_pri_context), %g3 | 730 | 2: sethi %hi(sparc64_kern_pri_context), %g3 |