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authorDavid S. Miller <davem@sunset.davemloft.net>2006-02-10 18:39:51 -0500
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 04:12:15 -0500
commit12eaa328f9fb2d3fcb5afb682c762690d05a3cd8 (patch)
treecce4e68b971757010a3e0bbf035fc65a381a3cd4 /arch/sparc64/kernel/head.S
parent18397944642cbca7fcd4a109b43ed5b4652e95b9 (diff)
[SPARC64]: Use ASI_SCRATCHPAD address 0x0 properly.
This is where the virtual address of the fault status area belongs. To set it up we don't make a hypervisor call, instead we call OBP's SUNW,set-trap-table with the real address of the fault status area as the second argument. And right before that call we write the virtual address into ASI_SCRATCHPAD vaddr 0x0. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/head.S')
-rw-r--r--arch/sparc64/kernel/head.S29
1 files changed, 27 insertions, 2 deletions
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S
index d048f0dfd423..f581f0e917f7 100644
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc64/kernel/head.S
@@ -521,11 +521,36 @@ setup_trap_table:
521 wrpr %g0, 15, %pil 521 wrpr %g0, 15, %pil
522 522
523 /* Make the firmware call to jump over to the Linux trap table. */ 523 /* Make the firmware call to jump over to the Linux trap table. */
524 call prom_set_trap_table 524 sethi %hi(is_sun4v), %o0
525 lduw [%o0 + %lo(is_sun4v)], %o0
526 brz,pt %o0, 1f
527 nop
528
529 TRAP_LOAD_TRAP_BLOCK(%g2, %g3)
530 add %g2, TRAP_PER_CPU_FAULT_INFO, %g2
531 stxa %g2, [%g0] ASI_SCRATCHPAD
532
533 /* Compute physical address:
534 *
535 * paddr = kern_base + (mmfsa_vaddr - KERNBASE)
536 */
537 sethi %hi(KERNBASE), %g3
538 sub %g2, %g3, %g2
539 sethi %hi(kern_base), %g3
540 ldx [%g3 + %lo(kern_base)], %g3
541 add %g2, %g3, %o1
542
543 call prom_set_trap_table_sun4v
544 sethi %hi(sparc64_ttable_tl0), %o0
545
546 ba,pt %xcc, 2f
547 nop
548
5491: call prom_set_trap_table
525 sethi %hi(sparc64_ttable_tl0), %o0 550 sethi %hi(sparc64_ttable_tl0), %o0
526 551
527 /* Start using proper page size encodings in ctx register. */ 552 /* Start using proper page size encodings in ctx register. */
528 sethi %hi(sparc64_kern_pri_context), %g3 5532: sethi %hi(sparc64_kern_pri_context), %g3
529 ldx [%g3 + %lo(sparc64_kern_pri_context)], %g2 554 ldx [%g3 + %lo(sparc64_kern_pri_context)], %g2
530 555
531 mov PRIMARY_CONTEXT, %g1 556 mov PRIMARY_CONTEXT, %g1