[SPARC64]: Fix bogus flush instruction usage.

Some of the trap code was still assuming that alternate
global %g6 was hard coded with current_thread_info().
Let's just consistently flush at KERNBASE when we need
a pipeline synchronization.  That's locked into the TLB
and will always work.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 4 insertions, 2 deletions

diff --git a/arch/sparc64/kernel/etrap.S b/arch/sparc64/kernel/etrap.S
index 8b3b6d720ed5..db7681017299 100644
--- a/arch/sparc64/kernel/etrap.S
+++ b/arch/sparc64/kernel/etrap.S
@@ -72,7 +72,8 @@ etrap_irq:
                 sethi   %hi(sparc64_kern_pri_context), %g2
                 ldx     [%g2 + %lo(sparc64_kern_pri_context)], %g3
                 stxa    %g3, [%l4] ASI_DMMU
-                flush   %l6
+                sethi   %hi(KERNBASE), %l4
+                flush   %l4
                 wr      %g0, ASI_AIUS, %asi
 2:              wrpr    %g0, 0x0, %tl
                 mov     %g4, %l4
@@ -215,7 +216,8 @@ scetrap:
                 sethi   %hi(sparc64_kern_pri_context), %g2
                 ldx     [%g2 + %lo(sparc64_kern_pri_context)], %g3
                 stxa    %g3, [%l4] ASI_DMMU
-                flush   %l6
+                sethi   %hi(KERNBASE), %l4
+                flush   %l4
 
                 mov     ASI_AIUS, %l7
 2:              mov     %g4, %l4