diff options
author | David S. Miller <davem@sunset.davemloft.net> | 2005-10-04 18:23:20 -0400 |
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committer | David S. Miller <davem@sunset.davemloft.net> | 2005-10-04 18:23:20 -0400 |
commit | 0835ae0f27c0bfde67613d189ef6c537e004a6de (patch) | |
tree | ad5cad209eeb11bd1bf49a3b5cffa49618c717c8 /arch/sparc64/kernel/etrap.S | |
parent | dd7205ed0f022a2a5e60eb7404e6c9f49d2301c3 (diff) |
[SPARC64]: Replace cheetah+ code patching with variables.
Instead of code patching to handle the page size fields in
the context registers, just use variables from which we get
the proper values.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/etrap.S')
-rw-r--r-- | arch/sparc64/kernel/etrap.S | 51 |
1 files changed, 4 insertions, 47 deletions
diff --git a/arch/sparc64/kernel/etrap.S b/arch/sparc64/kernel/etrap.S index 50d2af1d98ae..0d8eba21111b 100644 --- a/arch/sparc64/kernel/etrap.S +++ b/arch/sparc64/kernel/etrap.S | |||
@@ -68,12 +68,8 @@ etrap_irq: | |||
68 | 68 | ||
69 | wrpr %g3, 0, %otherwin | 69 | wrpr %g3, 0, %otherwin |
70 | wrpr %g2, 0, %wstate | 70 | wrpr %g2, 0, %wstate |
71 | cplus_etrap_insn_1: | 71 | sethi %hi(sparc64_kern_pri_context), %g2 |
72 | sethi %hi(0), %g3 | 72 | ldx [%g2 + %lo(sparc64_kern_pri_context)], %g3 |
73 | sllx %g3, 32, %g3 | ||
74 | cplus_etrap_insn_2: | ||
75 | sethi %hi(0), %g2 | ||
76 | or %g3, %g2, %g3 | ||
77 | stxa %g3, [%l4] ASI_DMMU | 73 | stxa %g3, [%l4] ASI_DMMU |
78 | flush %l6 | 74 | flush %l6 |
79 | wr %g0, ASI_AIUS, %asi | 75 | wr %g0, ASI_AIUS, %asi |
@@ -215,12 +211,8 @@ scetrap: rdpr %pil, %g2 | |||
215 | mov PRIMARY_CONTEXT, %l4 | 211 | mov PRIMARY_CONTEXT, %l4 |
216 | wrpr %g3, 0, %otherwin | 212 | wrpr %g3, 0, %otherwin |
217 | wrpr %g2, 0, %wstate | 213 | wrpr %g2, 0, %wstate |
218 | cplus_etrap_insn_3: | 214 | sethi %hi(sparc64_kern_pri_context), %g2 |
219 | sethi %hi(0), %g3 | 215 | ldx [%g2 + %lo(sparc64_kern_pri_context)], %g3 |
220 | sllx %g3, 32, %g3 | ||
221 | cplus_etrap_insn_4: | ||
222 | sethi %hi(0), %g2 | ||
223 | or %g3, %g2, %g3 | ||
224 | stxa %g3, [%l4] ASI_DMMU | 216 | stxa %g3, [%l4] ASI_DMMU |
225 | flush %l6 | 217 | flush %l6 |
226 | 218 | ||
@@ -264,38 +256,3 @@ cplus_etrap_insn_4: | |||
264 | 256 | ||
265 | #undef TASK_REGOFF | 257 | #undef TASK_REGOFF |
266 | #undef ETRAP_PSTATE1 | 258 | #undef ETRAP_PSTATE1 |
267 | |||
268 | cplus_einsn_1: | ||
269 | sethi %uhi(CTX_CHEETAH_PLUS_NUC), %g3 | ||
270 | cplus_einsn_2: | ||
271 | sethi %hi(CTX_CHEETAH_PLUS_CTX0), %g2 | ||
272 | |||
273 | .globl cheetah_plus_patch_etrap | ||
274 | cheetah_plus_patch_etrap: | ||
275 | /* We configure the dTLB512_0 for 4MB pages and the | ||
276 | * dTLB512_1 for 8K pages when in context zero. | ||
277 | */ | ||
278 | sethi %hi(cplus_einsn_1), %o0 | ||
279 | sethi %hi(cplus_etrap_insn_1), %o2 | ||
280 | lduw [%o0 + %lo(cplus_einsn_1)], %o1 | ||
281 | or %o2, %lo(cplus_etrap_insn_1), %o2 | ||
282 | stw %o1, [%o2] | ||
283 | flush %o2 | ||
284 | sethi %hi(cplus_etrap_insn_3), %o2 | ||
285 | or %o2, %lo(cplus_etrap_insn_3), %o2 | ||
286 | stw %o1, [%o2] | ||
287 | flush %o2 | ||
288 | |||
289 | sethi %hi(cplus_einsn_2), %o0 | ||
290 | sethi %hi(cplus_etrap_insn_2), %o2 | ||
291 | lduw [%o0 + %lo(cplus_einsn_2)], %o1 | ||
292 | or %o2, %lo(cplus_etrap_insn_2), %o2 | ||
293 | stw %o1, [%o2] | ||
294 | flush %o2 | ||
295 | sethi %hi(cplus_etrap_insn_4), %o2 | ||
296 | or %o2, %lo(cplus_etrap_insn_4), %o2 | ||
297 | stw %o1, [%o2] | ||
298 | flush %o2 | ||
299 | |||
300 | retl | ||
301 | nop | ||