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authorLinus Torvalds <torvalds@linux-foundation.org>2008-03-26 21:35:22 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-03-26 21:35:22 -0400
commitd55a4528f7f607ca2872fec18574bc8cec060f05 (patch)
treed7fa9184df280c53efaf5a73d648a255ed142196 /arch/sparc64/kernel/entry.h
parent08dcf29e01dcb786c13dc80045bd65f804117efb (diff)
parentc101b088ba0ed16d7109b2f3c2d16798d162a535 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6: [SPARC64]: Define TASK_SIZE_OF() [SPARC64]: flush_ptrace_access() needs preemption disable. [SPARC64]: Update defconfig. [SPARC64]: Fix allnoconfig build, ptrace.c missing CONFIG_COMPAT checks. [SPARC64]: Fix __get_cpu_var in preemption-enabled area. [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/signal.c [SPARC64]: Fix most sparse warnings in arch/sparc64/kernel/sys_sparc.c [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/time.c [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/ptrace.c [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/irq.c [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/iommu.c [SPARC64]: Fix sparse errors in arch/sparc64/kernel/traps.c [SPARC64]: Fix sparse warnings in arch/sparc64/kernel/{cpu,setup}.c [SPARC64]: Adjust {TLBTEMP,TSBMAP}_BASE. [SPARC64]: Make save_stack_trace() more efficient.
Diffstat (limited to 'arch/sparc64/kernel/entry.h')
-rw-r--r--arch/sparc64/kernel/entry.h196
1 files changed, 196 insertions, 0 deletions
diff --git a/arch/sparc64/kernel/entry.h b/arch/sparc64/kernel/entry.h
new file mode 100644
index 000000000000..4a91e9c6d31b
--- /dev/null
+++ b/arch/sparc64/kernel/entry.h
@@ -0,0 +1,196 @@
1#ifndef _ENTRY_H
2#define _ENTRY_H
3
4#include <linux/kernel.h>
5#include <linux/types.h>
6#include <linux/init.h>
7
8extern char *sparc_cpu_type;
9extern char *sparc_fpu_type;
10
11extern void __init per_cpu_patch(void);
12extern void __init sun4v_patch(void);
13extern void __init boot_cpu_id_too_large(int cpu);
14extern unsigned int dcache_parity_tl1_occurred;
15extern unsigned int icache_parity_tl1_occurred;
16
17extern asmlinkage void update_perfctrs(void);
18extern asmlinkage void sparc_breakpoint(struct pt_regs *regs);
19extern void timer_interrupt(int irq, struct pt_regs *regs);
20
21extern void do_notify_resume(struct pt_regs *regs,
22 unsigned long orig_i0,
23 int restart_syscall,
24 unsigned long thread_info_flags);
25
26extern asmlinkage void syscall_trace(struct pt_regs *regs,
27 int syscall_exit_p);
28
29extern void bad_trap_tl1(struct pt_regs *regs, long lvl);
30
31extern void do_fpe_common(struct pt_regs *regs);
32extern void do_fpieee(struct pt_regs *regs);
33extern void do_fpother(struct pt_regs *regs);
34extern void do_tof(struct pt_regs *regs);
35extern void do_div0(struct pt_regs *regs);
36extern void do_illegal_instruction(struct pt_regs *regs);
37extern void mem_address_unaligned(struct pt_regs *regs,
38 unsigned long sfar,
39 unsigned long sfsr);
40extern void sun4v_do_mna(struct pt_regs *regs,
41 unsigned long addr,
42 unsigned long type_ctx);
43extern void do_privop(struct pt_regs *regs);
44extern void do_privact(struct pt_regs *regs);
45extern void do_cee(struct pt_regs *regs);
46extern void do_cee_tl1(struct pt_regs *regs);
47extern void do_dae_tl1(struct pt_regs *regs);
48extern void do_iae_tl1(struct pt_regs *regs);
49extern void do_div0_tl1(struct pt_regs *regs);
50extern void do_fpdis_tl1(struct pt_regs *regs);
51extern void do_fpieee_tl1(struct pt_regs *regs);
52extern void do_fpother_tl1(struct pt_regs *regs);
53extern void do_ill_tl1(struct pt_regs *regs);
54extern void do_irq_tl1(struct pt_regs *regs);
55extern void do_lddfmna_tl1(struct pt_regs *regs);
56extern void do_stdfmna_tl1(struct pt_regs *regs);
57extern void do_paw(struct pt_regs *regs);
58extern void do_paw_tl1(struct pt_regs *regs);
59extern void do_vaw(struct pt_regs *regs);
60extern void do_vaw_tl1(struct pt_regs *regs);
61extern void do_tof_tl1(struct pt_regs *regs);
62extern void do_getpsr(struct pt_regs *regs);
63
64extern void spitfire_insn_access_exception(struct pt_regs *regs,
65 unsigned long sfsr,
66 unsigned long sfar);
67extern void spitfire_insn_access_exception_tl1(struct pt_regs *regs,
68 unsigned long sfsr,
69 unsigned long sfar);
70extern void spitfire_data_access_exception(struct pt_regs *regs,
71 unsigned long sfsr,
72 unsigned long sfar);
73extern void spitfire_data_access_exception_tl1(struct pt_regs *regs,
74 unsigned long sfsr,
75 unsigned long sfar);
76extern void spitfire_access_error(struct pt_regs *regs,
77 unsigned long status_encoded,
78 unsigned long afar);
79
80extern void cheetah_fecc_handler(struct pt_regs *regs,
81 unsigned long afsr,
82 unsigned long afar);
83extern void cheetah_cee_handler(struct pt_regs *regs,
84 unsigned long afsr,
85 unsigned long afar);
86extern void cheetah_deferred_handler(struct pt_regs *regs,
87 unsigned long afsr,
88 unsigned long afar);
89extern void cheetah_plus_parity_error(int type, struct pt_regs *regs);
90
91extern void sun4v_insn_access_exception(struct pt_regs *regs,
92 unsigned long addr,
93 unsigned long type_ctx);
94extern void sun4v_insn_access_exception_tl1(struct pt_regs *regs,
95 unsigned long addr,
96 unsigned long type_ctx);
97extern void sun4v_data_access_exception(struct pt_regs *regs,
98 unsigned long addr,
99 unsigned long type_ctx);
100extern void sun4v_data_access_exception_tl1(struct pt_regs *regs,
101 unsigned long addr,
102 unsigned long type_ctx);
103extern void sun4v_resum_error(struct pt_regs *regs,
104 unsigned long offset);
105extern void sun4v_resum_overflow(struct pt_regs *regs);
106extern void sun4v_nonresum_error(struct pt_regs *regs,
107 unsigned long offset);
108extern void sun4v_nonresum_overflow(struct pt_regs *regs);
109
110extern unsigned long sun4v_err_itlb_vaddr;
111extern unsigned long sun4v_err_itlb_ctx;
112extern unsigned long sun4v_err_itlb_pte;
113extern unsigned long sun4v_err_itlb_error;
114
115extern void sun4v_itlb_error_report(struct pt_regs *regs, int tl);
116
117extern unsigned long sun4v_err_dtlb_vaddr;
118extern unsigned long sun4v_err_dtlb_ctx;
119extern unsigned long sun4v_err_dtlb_pte;
120extern unsigned long sun4v_err_dtlb_error;
121
122extern void sun4v_dtlb_error_report(struct pt_regs *regs, int tl);
123extern void hypervisor_tlbop_error(unsigned long err,
124 unsigned long op);
125extern void hypervisor_tlbop_error_xcall(unsigned long err,
126 unsigned long op);
127
128/* WARNING: The error trap handlers in assembly know the precise
129 * layout of the following structure.
130 *
131 * C-level handlers in traps.c use this information to log the
132 * error and then determine how to recover (if possible).
133 */
134struct cheetah_err_info {
135/*0x00*/u64 afsr;
136/*0x08*/u64 afar;
137
138 /* D-cache state */
139/*0x10*/u64 dcache_data[4]; /* The actual data */
140/*0x30*/u64 dcache_index; /* D-cache index */
141/*0x38*/u64 dcache_tag; /* D-cache tag/valid */
142/*0x40*/u64 dcache_utag; /* D-cache microtag */
143/*0x48*/u64 dcache_stag; /* D-cache snooptag */
144
145 /* I-cache state */
146/*0x50*/u64 icache_data[8]; /* The actual insns + predecode */
147/*0x90*/u64 icache_index; /* I-cache index */
148/*0x98*/u64 icache_tag; /* I-cache phys tag */
149/*0xa0*/u64 icache_utag; /* I-cache microtag */
150/*0xa8*/u64 icache_stag; /* I-cache snooptag */
151/*0xb0*/u64 icache_upper; /* I-cache upper-tag */
152/*0xb8*/u64 icache_lower; /* I-cache lower-tag */
153
154 /* E-cache state */
155/*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */
156/*0xe0*/u64 ecache_index; /* E-cache index */
157/*0xe8*/u64 ecache_tag; /* E-cache tag/state */
158
159/*0xf0*/u64 __pad[32 - 30];
160};
161#define CHAFSR_INVALID ((u64)-1L)
162
163/* This is allocated at boot time based upon the largest hardware
164 * cpu ID in the system. We allocate two entries per cpu, one for
165 * TL==0 logging and one for TL >= 1 logging.
166 */
167extern struct cheetah_err_info *cheetah_error_log;
168
169/* UPA nodes send interrupt packet to UltraSparc with first data reg
170 * value low 5 (7 on Starfire) bits holding the IRQ identifier being
171 * delivered. We must translate this into a non-vector IRQ so we can
172 * set the softint on this cpu.
173 *
174 * To make processing these packets efficient and race free we use
175 * an array of irq buckets below. The interrupt vector handler in
176 * entry.S feeds incoming packets into per-cpu pil-indexed lists.
177 *
178 * If you make changes to ino_bucket, please update hand coded assembler
179 * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
180 */
181struct ino_bucket {
182/*0x00*/unsigned long __irq_chain_pa;
183
184 /* Virtual interrupt number assigned to this INO. */
185/*0x08*/unsigned int __virt_irq;
186/*0x0c*/unsigned int __pad;
187};
188
189extern struct ino_bucket *ivector_table;
190extern unsigned long ivector_table_pa;
191
192extern void handler_irq(int irq, struct pt_regs *regs);
193extern void init_irqwork_curcpu(void);
194extern void __cpuinit sun4v_register_mondo_queues(int this_cpu);
195
196#endif /* _ENTRY_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-21 08:54:04 -0500