diff options
| author | David S. Miller <davem@sunset.davemloft.net> | 2005-10-07 16:30:49 -0400 |
|---|---|---|
| committer | David S. Miller <davem@sunset.davemloft.net> | 2005-10-07 16:30:49 -0400 |
| commit | ba6399334dd8a75bd295de26496196c720abae0a (patch) | |
| tree | 0535e4bcfe8da7d0dde0bcf1ba8cb914c5f12e46 /arch/sparc64/kernel/entry.S | |
| parent | d85c3553df5e24cb3117385f0a17e1cc0436d148 (diff) | |
[SPARC64]: Fix userland FPU state corruption.
We need to use stricter memory barriers around the block
load and store instructions we use to save and restore the
FPU register file.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/entry.S')
| -rw-r--r-- | arch/sparc64/kernel/entry.S | 39 |
1 files changed, 21 insertions, 18 deletions
diff --git a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S index f685035dbdb8..11a848402fb1 100644 --- a/arch/sparc64/kernel/entry.S +++ b/arch/sparc64/kernel/entry.S | |||
| @@ -33,7 +33,7 @@ | |||
| 33 | /* This is trivial with the new code... */ | 33 | /* This is trivial with the new code... */ |
| 34 | .globl do_fpdis | 34 | .globl do_fpdis |
| 35 | do_fpdis: | 35 | do_fpdis: |
| 36 | sethi %hi(TSTATE_PEF), %g4 ! IEU0 | 36 | sethi %hi(TSTATE_PEF), %g4 |
| 37 | rdpr %tstate, %g5 | 37 | rdpr %tstate, %g5 |
| 38 | andcc %g5, %g4, %g0 | 38 | andcc %g5, %g4, %g0 |
| 39 | be,pt %xcc, 1f | 39 | be,pt %xcc, 1f |
| @@ -50,18 +50,18 @@ do_fpdis: | |||
| 50 | add %g0, %g0, %g0 | 50 | add %g0, %g0, %g0 |
| 51 | ba,a,pt %xcc, rtrap_clr_l6 | 51 | ba,a,pt %xcc, rtrap_clr_l6 |
| 52 | 52 | ||
| 53 | 1: ldub [%g6 + TI_FPSAVED], %g5 ! Load Group | 53 | 1: ldub [%g6 + TI_FPSAVED], %g5 |
| 54 | wr %g0, FPRS_FEF, %fprs ! LSU Group+4bubbles | 54 | wr %g0, FPRS_FEF, %fprs |
| 55 | andcc %g5, FPRS_FEF, %g0 ! IEU1 Group | 55 | andcc %g5, FPRS_FEF, %g0 |
| 56 | be,a,pt %icc, 1f ! CTI | 56 | be,a,pt %icc, 1f |
| 57 | clr %g7 ! IEU0 | 57 | clr %g7 |
| 58 | ldx [%g6 + TI_GSR], %g7 ! Load Group | 58 | ldx [%g6 + TI_GSR], %g7 |
| 59 | 1: andcc %g5, FPRS_DL, %g0 ! IEU1 | 59 | 1: andcc %g5, FPRS_DL, %g0 |
| 60 | bne,pn %icc, 2f ! CTI | 60 | bne,pn %icc, 2f |
| 61 | fzero %f0 ! FPA | 61 | fzero %f0 |
| 62 | andcc %g5, FPRS_DU, %g0 ! IEU1 Group | 62 | andcc %g5, FPRS_DU, %g0 |
| 63 | bne,pn %icc, 1f ! CTI | 63 | bne,pn %icc, 1f |
| 64 | fzero %f2 ! FPA | 64 | fzero %f2 |
| 65 | faddd %f0, %f2, %f4 | 65 | faddd %f0, %f2, %f4 |
| 66 | fmuld %f0, %f2, %f6 | 66 | fmuld %f0, %f2, %f6 |
| 67 | faddd %f0, %f2, %f8 | 67 | faddd %f0, %f2, %f8 |
| @@ -104,8 +104,10 @@ do_fpdis: | |||
| 104 | add %g6, TI_FPREGS + 0xc0, %g2 | 104 | add %g6, TI_FPREGS + 0xc0, %g2 |
| 105 | faddd %f0, %f2, %f8 | 105 | faddd %f0, %f2, %f8 |
| 106 | fmuld %f0, %f2, %f10 | 106 | fmuld %f0, %f2, %f10 |
| 107 | ldda [%g1] ASI_BLK_S, %f32 ! grrr, where is ASI_BLK_NUCLEUS 8-( | 107 | membar #Sync |
| 108 | ldda [%g1] ASI_BLK_S, %f32 | ||
| 108 | ldda [%g2] ASI_BLK_S, %f48 | 109 | ldda [%g2] ASI_BLK_S, %f48 |
| 110 | membar #Sync | ||
| 109 | faddd %f0, %f2, %f12 | 111 | faddd %f0, %f2, %f12 |
| 110 | fmuld %f0, %f2, %f14 | 112 | fmuld %f0, %f2, %f14 |
| 111 | faddd %f0, %f2, %f16 | 113 | faddd %f0, %f2, %f16 |
| @@ -116,7 +118,6 @@ do_fpdis: | |||
| 116 | fmuld %f0, %f2, %f26 | 118 | fmuld %f0, %f2, %f26 |
| 117 | faddd %f0, %f2, %f28 | 119 | faddd %f0, %f2, %f28 |
| 118 | fmuld %f0, %f2, %f30 | 120 | fmuld %f0, %f2, %f30 |
| 119 | membar #Sync | ||
| 120 | b,pt %xcc, fpdis_exit | 121 | b,pt %xcc, fpdis_exit |
| 121 | nop | 122 | nop |
| 122 | 2: andcc %g5, FPRS_DU, %g0 | 123 | 2: andcc %g5, FPRS_DU, %g0 |
| @@ -133,8 +134,10 @@ do_fpdis: | |||
| 133 | add %g6, TI_FPREGS + 0x40, %g2 | 134 | add %g6, TI_FPREGS + 0x40, %g2 |
| 134 | faddd %f32, %f34, %f36 | 135 | faddd %f32, %f34, %f36 |
| 135 | fmuld %f32, %f34, %f38 | 136 | fmuld %f32, %f34, %f38 |
| 136 | ldda [%g1] ASI_BLK_S, %f0 ! grrr, where is ASI_BLK_NUCLEUS 8-( | 137 | membar #Sync |
| 138 | ldda [%g1] ASI_BLK_S, %f0 | ||
| 137 | ldda [%g2] ASI_BLK_S, %f16 | 139 | ldda [%g2] ASI_BLK_S, %f16 |
| 140 | membar #Sync | ||
| 138 | faddd %f32, %f34, %f40 | 141 | faddd %f32, %f34, %f40 |
| 139 | fmuld %f32, %f34, %f42 | 142 | fmuld %f32, %f34, %f42 |
| 140 | faddd %f32, %f34, %f44 | 143 | faddd %f32, %f34, %f44 |
| @@ -147,7 +150,6 @@ do_fpdis: | |||
| 147 | fmuld %f32, %f34, %f58 | 150 | fmuld %f32, %f34, %f58 |
| 148 | faddd %f32, %f34, %f60 | 151 | faddd %f32, %f34, %f60 |
| 149 | fmuld %f32, %f34, %f62 | 152 | fmuld %f32, %f34, %f62 |
| 150 | membar #Sync | ||
| 151 | ba,pt %xcc, fpdis_exit | 153 | ba,pt %xcc, fpdis_exit |
| 152 | nop | 154 | nop |
| 153 | 3: mov SECONDARY_CONTEXT, %g3 | 155 | 3: mov SECONDARY_CONTEXT, %g3 |
| @@ -158,7 +160,8 @@ do_fpdis: | |||
| 158 | stxa %g2, [%g3] ASI_DMMU | 160 | stxa %g2, [%g3] ASI_DMMU |
| 159 | membar #Sync | 161 | membar #Sync |
| 160 | mov 0x40, %g2 | 162 | mov 0x40, %g2 |
| 161 | ldda [%g1] ASI_BLK_S, %f0 ! grrr, where is ASI_BLK_NUCLEUS 8-( | 163 | membar #Sync |
| 164 | ldda [%g1] ASI_BLK_S, %f0 | ||
| 162 | ldda [%g1 + %g2] ASI_BLK_S, %f16 | 165 | ldda [%g1 + %g2] ASI_BLK_S, %f16 |
| 163 | add %g1, 0x80, %g1 | 166 | add %g1, 0x80, %g1 |
| 164 | ldda [%g1] ASI_BLK_S, %f32 | 167 | ldda [%g1] ASI_BLK_S, %f32 |