diff options
author | Paul Mackerras <paulus@samba.org> | 2005-10-12 00:43:32 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2005-10-12 00:43:32 -0400 |
commit | b6ec995a21a9428aef620b5adf46d047a18d88b8 (patch) | |
tree | 6719121e6605cbca524b687f47336b9bbf3b8d41 /arch/sparc64/kernel/entry.S | |
parent | 3a5f8c5f788d68e325d9fe3c26f4df5a5aee838a (diff) | |
parent | da64c6ee6bb71bfb3f09d9bb89ce1aa4b1ee7e89 (diff) |
Merge from Linus' tree
Diffstat (limited to 'arch/sparc64/kernel/entry.S')
-rw-r--r-- | arch/sparc64/kernel/entry.S | 82 |
1 files changed, 29 insertions, 53 deletions
diff --git a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S index 2879b1072921..11a848402fb1 100644 --- a/arch/sparc64/kernel/entry.S +++ b/arch/sparc64/kernel/entry.S | |||
@@ -33,7 +33,7 @@ | |||
33 | /* This is trivial with the new code... */ | 33 | /* This is trivial with the new code... */ |
34 | .globl do_fpdis | 34 | .globl do_fpdis |
35 | do_fpdis: | 35 | do_fpdis: |
36 | sethi %hi(TSTATE_PEF), %g4 ! IEU0 | 36 | sethi %hi(TSTATE_PEF), %g4 |
37 | rdpr %tstate, %g5 | 37 | rdpr %tstate, %g5 |
38 | andcc %g5, %g4, %g0 | 38 | andcc %g5, %g4, %g0 |
39 | be,pt %xcc, 1f | 39 | be,pt %xcc, 1f |
@@ -50,18 +50,18 @@ do_fpdis: | |||
50 | add %g0, %g0, %g0 | 50 | add %g0, %g0, %g0 |
51 | ba,a,pt %xcc, rtrap_clr_l6 | 51 | ba,a,pt %xcc, rtrap_clr_l6 |
52 | 52 | ||
53 | 1: ldub [%g6 + TI_FPSAVED], %g5 ! Load Group | 53 | 1: ldub [%g6 + TI_FPSAVED], %g5 |
54 | wr %g0, FPRS_FEF, %fprs ! LSU Group+4bubbles | 54 | wr %g0, FPRS_FEF, %fprs |
55 | andcc %g5, FPRS_FEF, %g0 ! IEU1 Group | 55 | andcc %g5, FPRS_FEF, %g0 |
56 | be,a,pt %icc, 1f ! CTI | 56 | be,a,pt %icc, 1f |
57 | clr %g7 ! IEU0 | 57 | clr %g7 |
58 | ldx [%g6 + TI_GSR], %g7 ! Load Group | 58 | ldx [%g6 + TI_GSR], %g7 |
59 | 1: andcc %g5, FPRS_DL, %g0 ! IEU1 | 59 | 1: andcc %g5, FPRS_DL, %g0 |
60 | bne,pn %icc, 2f ! CTI | 60 | bne,pn %icc, 2f |
61 | fzero %f0 ! FPA | 61 | fzero %f0 |
62 | andcc %g5, FPRS_DU, %g0 ! IEU1 Group | 62 | andcc %g5, FPRS_DU, %g0 |
63 | bne,pn %icc, 1f ! CTI | 63 | bne,pn %icc, 1f |
64 | fzero %f2 ! FPA | 64 | fzero %f2 |
65 | faddd %f0, %f2, %f4 | 65 | faddd %f0, %f2, %f4 |
66 | fmuld %f0, %f2, %f6 | 66 | fmuld %f0, %f2, %f6 |
67 | faddd %f0, %f2, %f8 | 67 | faddd %f0, %f2, %f8 |
@@ -97,15 +97,17 @@ do_fpdis: | |||
97 | faddd %f0, %f2, %f4 | 97 | faddd %f0, %f2, %f4 |
98 | fmuld %f0, %f2, %f6 | 98 | fmuld %f0, %f2, %f6 |
99 | ldxa [%g3] ASI_DMMU, %g5 | 99 | ldxa [%g3] ASI_DMMU, %g5 |
100 | cplus_fptrap_insn_1: | 100 | sethi %hi(sparc64_kern_sec_context), %g2 |
101 | sethi %hi(0), %g2 | 101 | ldx [%g2 + %lo(sparc64_kern_sec_context)], %g2 |
102 | stxa %g2, [%g3] ASI_DMMU | 102 | stxa %g2, [%g3] ASI_DMMU |
103 | membar #Sync | 103 | membar #Sync |
104 | add %g6, TI_FPREGS + 0xc0, %g2 | 104 | add %g6, TI_FPREGS + 0xc0, %g2 |
105 | faddd %f0, %f2, %f8 | 105 | faddd %f0, %f2, %f8 |
106 | fmuld %f0, %f2, %f10 | 106 | fmuld %f0, %f2, %f10 |
107 | ldda [%g1] ASI_BLK_S, %f32 ! grrr, where is ASI_BLK_NUCLEUS 8-( | 107 | membar #Sync |
108 | ldda [%g1] ASI_BLK_S, %f32 | ||
108 | ldda [%g2] ASI_BLK_S, %f48 | 109 | ldda [%g2] ASI_BLK_S, %f48 |
110 | membar #Sync | ||
109 | faddd %f0, %f2, %f12 | 111 | faddd %f0, %f2, %f12 |
110 | fmuld %f0, %f2, %f14 | 112 | fmuld %f0, %f2, %f14 |
111 | faddd %f0, %f2, %f16 | 113 | faddd %f0, %f2, %f16 |
@@ -116,7 +118,6 @@ cplus_fptrap_insn_1: | |||
116 | fmuld %f0, %f2, %f26 | 118 | fmuld %f0, %f2, %f26 |
117 | faddd %f0, %f2, %f28 | 119 | faddd %f0, %f2, %f28 |
118 | fmuld %f0, %f2, %f30 | 120 | fmuld %f0, %f2, %f30 |
119 | membar #Sync | ||
120 | b,pt %xcc, fpdis_exit | 121 | b,pt %xcc, fpdis_exit |
121 | nop | 122 | nop |
122 | 2: andcc %g5, FPRS_DU, %g0 | 123 | 2: andcc %g5, FPRS_DU, %g0 |
@@ -126,15 +127,17 @@ cplus_fptrap_insn_1: | |||
126 | fzero %f34 | 127 | fzero %f34 |
127 | ldxa [%g3] ASI_DMMU, %g5 | 128 | ldxa [%g3] ASI_DMMU, %g5 |
128 | add %g6, TI_FPREGS, %g1 | 129 | add %g6, TI_FPREGS, %g1 |
129 | cplus_fptrap_insn_2: | 130 | sethi %hi(sparc64_kern_sec_context), %g2 |
130 | sethi %hi(0), %g2 | 131 | ldx [%g2 + %lo(sparc64_kern_sec_context)], %g2 |
131 | stxa %g2, [%g3] ASI_DMMU | 132 | stxa %g2, [%g3] ASI_DMMU |
132 | membar #Sync | 133 | membar #Sync |
133 | add %g6, TI_FPREGS + 0x40, %g2 | 134 | add %g6, TI_FPREGS + 0x40, %g2 |
134 | faddd %f32, %f34, %f36 | 135 | faddd %f32, %f34, %f36 |
135 | fmuld %f32, %f34, %f38 | 136 | fmuld %f32, %f34, %f38 |
136 | ldda [%g1] ASI_BLK_S, %f0 ! grrr, where is ASI_BLK_NUCLEUS 8-( | 137 | membar #Sync |
138 | ldda [%g1] ASI_BLK_S, %f0 | ||
137 | ldda [%g2] ASI_BLK_S, %f16 | 139 | ldda [%g2] ASI_BLK_S, %f16 |
140 | membar #Sync | ||
138 | faddd %f32, %f34, %f40 | 141 | faddd %f32, %f34, %f40 |
139 | fmuld %f32, %f34, %f42 | 142 | fmuld %f32, %f34, %f42 |
140 | faddd %f32, %f34, %f44 | 143 | faddd %f32, %f34, %f44 |
@@ -147,18 +150,18 @@ cplus_fptrap_insn_2: | |||
147 | fmuld %f32, %f34, %f58 | 150 | fmuld %f32, %f34, %f58 |
148 | faddd %f32, %f34, %f60 | 151 | faddd %f32, %f34, %f60 |
149 | fmuld %f32, %f34, %f62 | 152 | fmuld %f32, %f34, %f62 |
150 | membar #Sync | ||
151 | ba,pt %xcc, fpdis_exit | 153 | ba,pt %xcc, fpdis_exit |
152 | nop | 154 | nop |
153 | 3: mov SECONDARY_CONTEXT, %g3 | 155 | 3: mov SECONDARY_CONTEXT, %g3 |
154 | add %g6, TI_FPREGS, %g1 | 156 | add %g6, TI_FPREGS, %g1 |
155 | ldxa [%g3] ASI_DMMU, %g5 | 157 | ldxa [%g3] ASI_DMMU, %g5 |
156 | cplus_fptrap_insn_3: | 158 | sethi %hi(sparc64_kern_sec_context), %g2 |
157 | sethi %hi(0), %g2 | 159 | ldx [%g2 + %lo(sparc64_kern_sec_context)], %g2 |
158 | stxa %g2, [%g3] ASI_DMMU | 160 | stxa %g2, [%g3] ASI_DMMU |
159 | membar #Sync | 161 | membar #Sync |
160 | mov 0x40, %g2 | 162 | mov 0x40, %g2 |
161 | ldda [%g1] ASI_BLK_S, %f0 ! grrr, where is ASI_BLK_NUCLEUS 8-( | 163 | membar #Sync |
164 | ldda [%g1] ASI_BLK_S, %f0 | ||
162 | ldda [%g1 + %g2] ASI_BLK_S, %f16 | 165 | ldda [%g1 + %g2] ASI_BLK_S, %f16 |
163 | add %g1, 0x80, %g1 | 166 | add %g1, 0x80, %g1 |
164 | ldda [%g1] ASI_BLK_S, %f32 | 167 | ldda [%g1] ASI_BLK_S, %f32 |
@@ -319,8 +322,8 @@ do_fptrap_after_fsr: | |||
319 | stx %g3, [%g6 + TI_GSR] | 322 | stx %g3, [%g6 + TI_GSR] |
320 | mov SECONDARY_CONTEXT, %g3 | 323 | mov SECONDARY_CONTEXT, %g3 |
321 | ldxa [%g3] ASI_DMMU, %g5 | 324 | ldxa [%g3] ASI_DMMU, %g5 |
322 | cplus_fptrap_insn_4: | 325 | sethi %hi(sparc64_kern_sec_context), %g2 |
323 | sethi %hi(0), %g2 | 326 | ldx [%g2 + %lo(sparc64_kern_sec_context)], %g2 |
324 | stxa %g2, [%g3] ASI_DMMU | 327 | stxa %g2, [%g3] ASI_DMMU |
325 | membar #Sync | 328 | membar #Sync |
326 | add %g6, TI_FPREGS, %g2 | 329 | add %g6, TI_FPREGS, %g2 |
@@ -341,33 +344,6 @@ cplus_fptrap_insn_4: | |||
341 | ba,pt %xcc, etrap | 344 | ba,pt %xcc, etrap |
342 | wr %g0, 0, %fprs | 345 | wr %g0, 0, %fprs |
343 | 346 | ||
344 | cplus_fptrap_1: | ||
345 | sethi %hi(CTX_CHEETAH_PLUS_CTX0), %g2 | ||
346 | |||
347 | .globl cheetah_plus_patch_fpdis | ||
348 | cheetah_plus_patch_fpdis: | ||
349 | /* We configure the dTLB512_0 for 4MB pages and the | ||
350 | * dTLB512_1 for 8K pages when in context zero. | ||
351 | */ | ||
352 | sethi %hi(cplus_fptrap_1), %o0 | ||
353 | lduw [%o0 + %lo(cplus_fptrap_1)], %o1 | ||
354 | |||
355 | set cplus_fptrap_insn_1, %o2 | ||
356 | stw %o1, [%o2] | ||
357 | flush %o2 | ||
358 | set cplus_fptrap_insn_2, %o2 | ||
359 | stw %o1, [%o2] | ||
360 | flush %o2 | ||
361 | set cplus_fptrap_insn_3, %o2 | ||
362 | stw %o1, [%o2] | ||
363 | flush %o2 | ||
364 | set cplus_fptrap_insn_4, %o2 | ||
365 | stw %o1, [%o2] | ||
366 | flush %o2 | ||
367 | |||
368 | retl | ||
369 | nop | ||
370 | |||
371 | /* The registers for cross calls will be: | 347 | /* The registers for cross calls will be: |
372 | * | 348 | * |
373 | * DATA 0: [low 32-bits] Address of function to call, jmp to this | 349 | * DATA 0: [low 32-bits] Address of function to call, jmp to this |