diff options
author | David S. Miller <davem@sunset.davemloft.net> | 2007-08-08 20:11:39 -0400 |
---|---|---|
committer | David S. Miller <davem@sunset.davemloft.net> | 2007-08-08 20:33:45 -0400 |
commit | 6c70b6fc7b6fc321636a014082d9e32333da1f80 (patch) | |
tree | ff0e52bb7ba43b058b7cbb88b952fd268fbe3ad2 /arch/sparc64/kernel/cpu.c | |
parent | 68c9f9fd336dc7e793cecad25f8ac40ccaa7a256 (diff) |
[SPARC64]: Do not assume sun4v chips have load-twin/store-init support.
Check the cpu type in the OBP device tree before committing to
using the optimized Niagara memcpy and memset implementation.
If we don't recognize the cpu type, use a completely generic
version.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/cpu.c')
-rw-r--r-- | arch/sparc64/kernel/cpu.c | 42 |
1 files changed, 15 insertions, 27 deletions
diff --git a/arch/sparc64/kernel/cpu.c b/arch/sparc64/kernel/cpu.c index e4eff878123d..e43db73f2b91 100644 --- a/arch/sparc64/kernel/cpu.c +++ b/arch/sparc64/kernel/cpu.c | |||
@@ -13,7 +13,7 @@ | |||
13 | #include <asm/fpumacro.h> | 13 | #include <asm/fpumacro.h> |
14 | #include <asm/cpudata.h> | 14 | #include <asm/cpudata.h> |
15 | #include <asm/spitfire.h> | 15 | #include <asm/spitfire.h> |
16 | #include <asm/prom.h> | 16 | #include <asm/oplib.h> |
17 | 17 | ||
18 | DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 }; | 18 | DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 }; |
19 | 19 | ||
@@ -69,36 +69,24 @@ unsigned int fsr_storage; | |||
69 | 69 | ||
70 | static void __init sun4v_cpu_probe(void) | 70 | static void __init sun4v_cpu_probe(void) |
71 | { | 71 | { |
72 | struct device_node *dp; | 72 | switch (sun4v_chip_type) { |
73 | const char *compat; | 73 | case SUN4V_CHIP_NIAGARA1: |
74 | int len; | ||
75 | |||
76 | dp = of_find_node_by_name(NULL, "cpu"); | ||
77 | if (!dp) | ||
78 | goto no_compat; | ||
79 | |||
80 | compat = of_get_property(dp, "compatible", &len); | ||
81 | if (!compat) | ||
82 | goto no_compat; | ||
83 | |||
84 | if (of_find_in_proplist(compat, "SUNW,UltraSPARC-T1", len)) { | ||
85 | sparc_cpu_type = "UltraSparc T1 (Niagara)"; | 74 | sparc_cpu_type = "UltraSparc T1 (Niagara)"; |
86 | sparc_fpu_type = "UltraSparc T1 integrated FPU"; | 75 | sparc_fpu_type = "UltraSparc T1 integrated FPU"; |
87 | } else if (of_find_in_proplist(compat, "SUNW,UltraSPARC-T2", len)) { | 76 | break; |
77 | |||
78 | case SUN4V_CHIP_NIAGARA2: | ||
88 | sparc_cpu_type = "UltraSparc T2 (Niagara2)"; | 79 | sparc_cpu_type = "UltraSparc T2 (Niagara2)"; |
89 | sparc_fpu_type = "UltraSparc T2 integrated FPU"; | 80 | sparc_fpu_type = "UltraSparc T2 integrated FPU"; |
90 | } else | 81 | break; |
91 | goto unknown; | 82 | |
92 | 83 | default: | |
93 | return; | 84 | printk(KERN_WARNING "CPU: Unknown sun4v cpu type [%s]\n", |
94 | 85 | prom_cpu_compatible); | |
95 | no_compat: | 86 | sparc_cpu_type = "Unknown SUN4V CPU"; |
96 | compat = "no property"; | 87 | sparc_fpu_type = "Unknown SUN4V FPU"; |
97 | 88 | break; | |
98 | unknown: | 89 | } |
99 | printk(KERN_WARNING "CPU: Unknown sun4v cpu type [%s]\n", compat); | ||
100 | sparc_cpu_type = "Unknown SUN4V CPU"; | ||
101 | sparc_fpu_type = "Unknown SUN4V FPU"; | ||
102 | } | 90 | } |
103 | 91 | ||
104 | void __init cpu_probe(void) | 92 | void __init cpu_probe(void) |