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authorLinus Torvalds <torvalds@linux-foundation.org>2014-08-06 12:41:23 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-08-06 12:41:23 -0400
commit049711bf3cc59501ebeae621aa22acd3918ebd79 (patch)
treed6168b7bb3d8cee71a4a4e43a85cfaf2a3ef1a0a /arch/sparc/lib
parentae045e2455429c418a418a3376301a9e5753a0a8 (diff)
parent5b6ff9df056b69a3b65708bfb9923af41146c8c8 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next
Pull sparc updates from David Miller: 1) Add sparc RAM output to /proc/iomem, from Bob Picco. 2) Allow seeks on /dev/mdesc, from Khalid Aziz. 3) Cleanup sparc64 I/O accessors, from Sam Ravnborg. 4) If update_mmu_cache{,_pmd}() is called with an not-valid mapping, do not insert it into the TLB miss hash tables otherwise we'll livelock. Based upon work by Christopher Alexander Tobias Schulze. 5) Fix BREAK detection in sunsab driver when no actual characters are pending, from Christopher Alexander Tobias Schulze. 6) Because we have modules --> openfirmware --> vmalloc ordering of virtual memory, the lazy VMAP TLB flusher can cons up an invocation of flush_tlb_kernel_range() that covers the openfirmware address range. Unfortunately this will flush out the firmware's locked TLB mapping which causes all kinds of trouble. Just split up the flush request if this happens, but in the long term the lazy VMAP flusher should probably be made a little bit smarter. Based upon work by Christopher Alexander Tobias Schulze. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next: sparc64: Fix up merge thinko. sparc: Add "install" target arch/sparc/math-emu/math_32.c: drop stray break operator sparc64: ldc_connect() should not return EINVAL when handshake is in progress. sparc64: Guard against flushing openfirmware mappings. sunsab: Fix detection of BREAK on sunsab serial console bbc-i2c: Fix BBC I2C envctrl on SunBlade 2000 sparc64: Do not insert non-valid PTEs into the TSB hash table. sparc64: avoid code duplication in io_64.h sparc64: reorder functions in io_64.h sparc64: drop unused SLOW_DOWN_IO definitions sparc64: remove macro indirection in io_64.h sparc64: update IO access functions in PeeCeeI sparcspkr: use sbus_*() primitives for IO sparc: Add support for seek and shorter read to /dev/mdesc sparc: use %s for unaligned panic drivers/sbus/char: Micro-optimization in display7seg.c display7seg: Introduce the use of the managed version of kzalloc sparc64 - add mem to iomem resource
Diffstat (limited to 'arch/sparc/lib')
-rw-r--r--arch/sparc/lib/PeeCeeI.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/arch/sparc/lib/PeeCeeI.c b/arch/sparc/lib/PeeCeeI.c
index 6529f8657597..e6d183675990 100644
--- a/arch/sparc/lib/PeeCeeI.c
+++ b/arch/sparc/lib/PeeCeeI.c
@@ -15,7 +15,7 @@ void outsb(unsigned long __addr, const void *src, unsigned long count)
15 const u8 *p = src; 15 const u8 *p = src;
16 16
17 while (count--) 17 while (count--)
18 outb(*p++, addr); 18 __raw_writeb(*p++, addr);
19} 19}
20EXPORT_SYMBOL(outsb); 20EXPORT_SYMBOL(outsb);
21 21
@@ -93,21 +93,21 @@ void insb(unsigned long __addr, void *dst, unsigned long count)
93 u8 *pb = dst; 93 u8 *pb = dst;
94 94
95 while ((((unsigned long)pb) & 0x3) && count--) 95 while ((((unsigned long)pb) & 0x3) && count--)
96 *pb++ = inb(addr); 96 *pb++ = __raw_readb(addr);
97 pi = (u32 *)pb; 97 pi = (u32 *)pb;
98 while (count >= 4) { 98 while (count >= 4) {
99 u32 w; 99 u32 w;
100 100
101 w = (inb(addr) << 24); 101 w = (__raw_readb(addr) << 24);
102 w |= (inb(addr) << 16); 102 w |= (__raw_readb(addr) << 16);
103 w |= (inb(addr) << 8); 103 w |= (__raw_readb(addr) << 8);
104 w |= (inb(addr) << 0); 104 w |= (__raw_readb(addr) << 0);
105 *pi++ = w; 105 *pi++ = w;
106 count -= 4; 106 count -= 4;
107 } 107 }
108 pb = (u8 *)pi; 108 pb = (u8 *)pi;
109 while (count--) 109 while (count--)
110 *pb++ = inb(addr); 110 *pb++ = __raw_readb(addr);
111 } 111 }
112} 112}
113EXPORT_SYMBOL(insb); 113EXPORT_SYMBOL(insb);
@@ -121,21 +121,21 @@ void insw(unsigned long __addr, void *dst, unsigned long count)
121 u32 *pi; 121 u32 *pi;
122 122
123 if (((unsigned long)ps) & 0x2) { 123 if (((unsigned long)ps) & 0x2) {
124 *ps++ = le16_to_cpu(inw(addr)); 124 *ps++ = __raw_readw(addr);
125 count--; 125 count--;
126 } 126 }
127 pi = (u32 *)ps; 127 pi = (u32 *)ps;
128 while (count >= 2) { 128 while (count >= 2) {
129 u32 w; 129 u32 w;
130 130
131 w = (le16_to_cpu(inw(addr)) << 16); 131 w = __raw_readw(addr) << 16;
132 w |= (le16_to_cpu(inw(addr)) << 0); 132 w |= __raw_readw(addr) << 0;
133 *pi++ = w; 133 *pi++ = w;
134 count -= 2; 134 count -= 2;
135 } 135 }
136 ps = (u16 *)pi; 136 ps = (u16 *)pi;
137 if (count) 137 if (count)
138 *ps = le16_to_cpu(inw(addr)); 138 *ps = __raw_readw(addr);
139 } 139 }
140} 140}
141EXPORT_SYMBOL(insw); 141EXPORT_SYMBOL(insw);
@@ -148,7 +148,7 @@ void insl(unsigned long __addr, void *dst, unsigned long count)
148 if ((((unsigned long)dst) & 0x3) == 0) { 148 if ((((unsigned long)dst) & 0x3) == 0) {
149 u32 *pi = dst; 149 u32 *pi = dst;
150 while (count--) 150 while (count--)
151 *pi++ = le32_to_cpu(inl(addr)); 151 *pi++ = __raw_readl(addr);
152 } else { 152 } else {
153 u32 l = 0, l2, *pi; 153 u32 l = 0, l2, *pi;
154 u16 *ps; 154 u16 *ps;
@@ -158,11 +158,11 @@ void insl(unsigned long __addr, void *dst, unsigned long count)
158 case 0x2: 158 case 0x2:
159 ps = dst; 159 ps = dst;
160 count -= 1; 160 count -= 1;
161 l = le32_to_cpu(inl(addr)); 161 l = __raw_readl(addr);
162 *ps++ = l; 162 *ps++ = l;
163 pi = (u32 *)ps; 163 pi = (u32 *)ps;
164 while (count--) { 164 while (count--) {
165 l2 = le32_to_cpu(inl(addr)); 165 l2 = __raw_readl(addr);
166 *pi++ = (l << 16) | (l2 >> 16); 166 *pi++ = (l << 16) | (l2 >> 16);
167 l = l2; 167 l = l2;
168 } 168 }
@@ -173,13 +173,13 @@ void insl(unsigned long __addr, void *dst, unsigned long count)
173 case 0x1: 173 case 0x1:
174 pb = dst; 174 pb = dst;
175 count -= 1; 175 count -= 1;
176 l = le32_to_cpu(inl(addr)); 176 l = __raw_readl(addr);
177 *pb++ = l >> 24; 177 *pb++ = l >> 24;
178 ps = (u16 *)pb; 178 ps = (u16 *)pb;
179 *ps++ = ((l >> 8) & 0xffff); 179 *ps++ = ((l >> 8) & 0xffff);
180 pi = (u32 *)ps; 180 pi = (u32 *)ps;
181 while (count--) { 181 while (count--) {
182 l2 = le32_to_cpu(inl(addr)); 182 l2 = __raw_readl(addr);
183 *pi++ = (l << 24) | (l2 >> 8); 183 *pi++ = (l << 24) | (l2 >> 8);
184 l = l2; 184 l = l2;
185 } 185 }
@@ -190,11 +190,11 @@ void insl(unsigned long __addr, void *dst, unsigned long count)
190 case 0x3: 190 case 0x3:
191 pb = (u8 *)dst; 191 pb = (u8 *)dst;
192 count -= 1; 192 count -= 1;
193 l = le32_to_cpu(inl(addr)); 193 l = __raw_readl(addr);
194 *pb++ = l >> 24; 194 *pb++ = l >> 24;
195 pi = (u32 *)pb; 195 pi = (u32 *)pb;
196 while (count--) { 196 while (count--) {
197 l2 = le32_to_cpu(inl(addr)); 197 l2 = __raw_readl(addr);
198 *pi++ = (l << 8) | (l2 >> 24); 198 *pi++ = (l << 8) | (l2 >> 24);
199 l = l2; 199 l = l2;
200 } 200 }