diff options
author | Sam Ravnborg <sam@ravnborg.org> | 2012-05-14 09:14:36 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2012-05-14 17:05:07 -0400 |
commit | 4ba22b16bbf354822b7988ec5b4b35774dcd479f (patch) | |
tree | 3476a58b0d8788b89b575f4926e294f4b8bbdd43 /arch/sparc/kernel/sun4m_irq.c | |
parent | c68e5d39a502d01421cbc70d25c377e9215facef (diff) |
sparc32: move smp ipi to method ops
I ended up renaming set_cpu_int to send_ipi to
be consistent all way around.
send_ipi was moved to the *_smp.c files so
we could call the relevant method direct,
without any _ops indirection.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel/sun4m_irq.c')
-rw-r--r-- | arch/sparc/kernel/sun4m_irq.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index 32d3a5ce50f3..eb2c277aaf94 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c | |||
@@ -112,9 +112,6 @@ struct sun4m_handler_data { | |||
112 | #define SUN4M_INT_E14 0x00000080 | 112 | #define SUN4M_INT_E14 0x00000080 |
113 | #define SUN4M_INT_E10 0x00080000 | 113 | #define SUN4M_INT_E10 0x00080000 |
114 | 114 | ||
115 | #define SUN4M_HARD_INT(x) (0x000000001 << (x)) | ||
116 | #define SUN4M_SOFT_INT(x) (0x000010000 << (x)) | ||
117 | |||
118 | #define SUN4M_INT_MASKALL 0x80000000 /* mask all interrupts */ | 115 | #define SUN4M_INT_MASKALL 0x80000000 /* mask all interrupts */ |
119 | #define SUN4M_INT_MODULE_ERR 0x40000000 /* module error */ | 116 | #define SUN4M_INT_MODULE_ERR 0x40000000 /* module error */ |
120 | #define SUN4M_INT_M2S_WRITE_ERR 0x20000000 /* write buffer error */ | 117 | #define SUN4M_INT_M2S_WRITE_ERR 0x20000000 /* write buffer error */ |
@@ -282,13 +279,6 @@ out: | |||
282 | return irq; | 279 | return irq; |
283 | } | 280 | } |
284 | 281 | ||
285 | #ifdef CONFIG_SMP | ||
286 | static void sun4m_send_ipi(int cpu, int level) | ||
287 | { | ||
288 | sbus_writel(SUN4M_SOFT_INT(level), &sun4m_irq_percpu[cpu]->set); | ||
289 | } | ||
290 | #endif | ||
291 | |||
292 | struct sun4m_timer_percpu { | 282 | struct sun4m_timer_percpu { |
293 | u32 l14_limit; | 283 | u32 l14_limit; |
294 | u32 l14_count; | 284 | u32 l14_count; |
@@ -479,9 +469,5 @@ void __init sun4m_init_IRQ(void) | |||
479 | sparc_config.build_device_irq = sun4m_build_device_irq; | 469 | sparc_config.build_device_irq = sun4m_build_device_irq; |
480 | sparc_config.clock_rate = SBUS_CLOCK_RATE; | 470 | sparc_config.clock_rate = SBUS_CLOCK_RATE; |
481 | 471 | ||
482 | #ifdef CONFIG_SMP | ||
483 | BTFIXUPSET_CALL(set_cpu_int, sun4m_send_ipi, BTFIXUPCALL_NORM); | ||
484 | #endif | ||
485 | |||
486 | /* Cannot enable interrupts until OBP ticker is disabled. */ | 472 | /* Cannot enable interrupts until OBP ticker is disabled. */ |
487 | } | 473 | } |