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authorDavid S. Miller <davem@davemloft.net>2009-09-10 09:28:20 -0400
committerDavid S. Miller <davem@davemloft.net>2009-09-10 09:28:20 -0400
commit59abbd1e7cfd6018fb8e58a96aa562aaff8711e7 (patch)
tree18114674792b9b79fff35b69bab7eea6a20fcf00 /arch/sparc/kernel/nmi.c
parent5686f9c3d67d5a20108fa26105c98b042df13123 (diff)
sparc64: Initial hw perf counter support.
Only supports one simple counter and only UltraSPARC-IIIi chips. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel/nmi.c')
-rw-r--r--arch/sparc/kernel/nmi.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c
index 7de19dd30f40..391a6ed9a184 100644
--- a/arch/sparc/kernel/nmi.c
+++ b/arch/sparc/kernel/nmi.c
@@ -19,6 +19,7 @@
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/smp.h> 20#include <linux/smp.h>
21 21
22#include <asm/perf_counter.h>
22#include <asm/ptrace.h> 23#include <asm/ptrace.h>
23#include <asm/local.h> 24#include <asm/local.h>
24#include <asm/pcr.h> 25#include <asm/pcr.h>
@@ -156,7 +157,7 @@ static void report_broken_nmi(int cpu, int *prev_nmi_count)
156 atomic_dec(&nmi_active); 157 atomic_dec(&nmi_active);
157} 158}
158 159
159static void stop_nmi_watchdog(void *unused) 160void stop_nmi_watchdog(void *unused)
160{ 161{
161 pcr_ops->write(PCR_PIC_PRIV); 162 pcr_ops->write(PCR_PIC_PRIV);
162 __get_cpu_var(wd_enabled) = 0; 163 __get_cpu_var(wd_enabled) = 0;
@@ -210,7 +211,7 @@ error:
210 return err; 211 return err;
211} 212}
212 213
213static void start_nmi_watchdog(void *unused) 214void start_nmi_watchdog(void *unused)
214{ 215{
215 __get_cpu_var(wd_enabled) = 1; 216 __get_cpu_var(wd_enabled) = 1;
216 atomic_inc(&nmi_active); 217 atomic_inc(&nmi_active);
@@ -263,6 +264,9 @@ int __init nmi_init(void)
263 atomic_set(&nmi_active, -1); 264 atomic_set(&nmi_active, -1);
264 } 265 }
265 } 266 }
267 if (!err)
268 init_hw_perf_counters();
269
266 return err; 270 return err;
267} 271}
268 272