sparc: Access kernel TSB using physical addressing when possible.

On sun4v this is basically required since we point the hypervisor and
the TSB walking hardware at these tables using physical addressing
too.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 12 insertions, 12 deletions

diff --git a/arch/sparc/kernel/ktlb.S b/arch/sparc/kernel/ktlb.S
index 1d361477d7d6..79f310364849 100644
--- a/arch/sparc/kernel/ktlb.S
+++ b/arch/sparc/kernel/ktlb.S
@@ -47,16 +47,16 @@ kvmap_itlb_tsb_miss:
 kvmap_itlb_vmalloc_addr:
         KERN_PGTABLE_WALK(%g4, %g5, %g2, kvmap_itlb_longpath)
 
-        KTSB_LOCK_TAG(%g1, %g2, %g7)
+        TSB_LOCK_TAG(%g1, %g2, %g7)
 
         /* Load and check PTE.  */
         ldxa            [%g5] ASI_PHYS_USE_EC, %g5
         mov             1, %g7
         sllx            %g7, TSB_TAG_INVALID_BIT, %g7
         brgez,a,pn      %g5, kvmap_itlb_longpath
-         KTSB_STORE(%g1, %g7)
+         TSB_STORE(%g1, %g7)
 
-        KTSB_WRITE(%g1, %g5, %g6)
+        TSB_WRITE(%g1, %g5, %g6)
 
         /* fallthrough to TLB load */
 
@@ -102,9 +102,9 @@ kvmap_itlb_longpath:
 kvmap_itlb_obp:
         OBP_TRANS_LOOKUP(%g4, %g5, %g2, %g3, kvmap_itlb_longpath)
 
-        KTSB_LOCK_TAG(%g1, %g2, %g7)
+        TSB_LOCK_TAG(%g1, %g2, %g7)
 
-        KTSB_WRITE(%g1, %g5, %g6)
+        TSB_WRITE(%g1, %g5, %g6)
 
         ba,pt           %xcc, kvmap_itlb_load
          nop
@@ -112,17 +112,17 @@ kvmap_itlb_obp:
 kvmap_dtlb_obp:
         OBP_TRANS_LOOKUP(%g4, %g5, %g2, %g3, kvmap_dtlb_longpath)
 
-        KTSB_LOCK_TAG(%g1, %g2, %g7)
+        TSB_LOCK_TAG(%g1, %g2, %g7)
 
-        KTSB_WRITE(%g1, %g5, %g6)
+        TSB_WRITE(%g1, %g5, %g6)
 
         ba,pt           %xcc, kvmap_dtlb_load
          nop
 
         .align          32
 kvmap_dtlb_tsb4m_load:
-        KTSB_LOCK_TAG(%g1, %g2, %g7)
-        KTSB_WRITE(%g1, %g5, %g6)
+        TSB_LOCK_TAG(%g1, %g2, %g7)
+        TSB_WRITE(%g1, %g5, %g6)
         ba,pt           %xcc, kvmap_dtlb_load
          nop
 
@@ -222,16 +222,16 @@ kvmap_linear_patch:
 kvmap_dtlb_vmalloc_addr:
         KERN_PGTABLE_WALK(%g4, %g5, %g2, kvmap_dtlb_longpath)
 
-        KTSB_LOCK_TAG(%g1, %g2, %g7)
+        TSB_LOCK_TAG(%g1, %g2, %g7)
 
         /* Load and check PTE.  */
         ldxa            [%g5] ASI_PHYS_USE_EC, %g5
         mov             1, %g7
         sllx            %g7, TSB_TAG_INVALID_BIT, %g7
         brgez,a,pn      %g5, kvmap_dtlb_longpath
-         KTSB_STORE(%g1, %g7)
+         TSB_STORE(%g1, %g7)
 
-        KTSB_WRITE(%g1, %g5, %g6)
+        TSB_WRITE(%g1, %g5, %g6)
 
         /* fallthrough to TLB load */