diff options
author | FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> | 2009-08-09 22:53:16 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-08-10 03:35:00 -0400 |
commit | ee664a9252d24ef10317d1bba8fc8f4c6495b36c (patch) | |
tree | 5a9d50253ff11584251439b2931e95042e9631c2 /arch/sparc/kernel/ioport.c | |
parent | c2c07dbd8742a26ab3f1ee8b82237a060a0d9f61 (diff) |
sparc: Use asm-generic/pci-dma-compat
This converts SPARC to use asm-generic/pci-dma-compat instead
of the homegrown mechnism.
SPARC32 has two dma_map_ops structures for pci and sbus
(removing arch/sparc/kernel/dma.c, PCI and SBUS DMA accessor).
The global 'dma_ops' is set to sbus_dma_ops and get_dma_ops()
returns pci32_dma_ops for pci devices so we can use the
appropriate dma mapping operations.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Tested-by: Robert Reif <reif@earthlink.net>
Acked-by: David S. Miller <davem@davemloft.net>
Cc: tony.luck@intel.com
Cc: fenghua.yu@intel.com
LKML-Reference: <1249872797-1314-8-git-send-email-fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/sparc/kernel/ioport.c')
-rw-r--r-- | arch/sparc/kernel/ioport.c | 162 |
1 files changed, 76 insertions, 86 deletions
diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c index 39ff1e0c5183..1eb604389655 100644 --- a/arch/sparc/kernel/ioport.c +++ b/arch/sparc/kernel/ioport.c | |||
@@ -48,8 +48,6 @@ | |||
48 | #include <asm/iommu.h> | 48 | #include <asm/iommu.h> |
49 | #include <asm/io-unit.h> | 49 | #include <asm/io-unit.h> |
50 | 50 | ||
51 | #include "dma.h" | ||
52 | |||
53 | #define mmu_inval_dma_area(p, l) /* Anton pulled it out for 2.4.0-xx */ | 51 | #define mmu_inval_dma_area(p, l) /* Anton pulled it out for 2.4.0-xx */ |
54 | 52 | ||
55 | static struct resource *_sparc_find_resource(struct resource *r, | 53 | static struct resource *_sparc_find_resource(struct resource *r, |
@@ -246,7 +244,8 @@ EXPORT_SYMBOL(sbus_set_sbus64); | |||
246 | * Typically devices use them for control blocks. | 244 | * Typically devices use them for control blocks. |
247 | * CPU may access them without any explicit flushing. | 245 | * CPU may access them without any explicit flushing. |
248 | */ | 246 | */ |
249 | void *sbus_alloc_consistent(struct device *dev, long len, u32 *dma_addrp) | 247 | static void *sbus_alloc_coherent(struct device *dev, size_t len, |
248 | dma_addr_t *dma_addrp, gfp_t gfp) | ||
250 | { | 249 | { |
251 | struct of_device *op = to_of_device(dev); | 250 | struct of_device *op = to_of_device(dev); |
252 | unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK; | 251 | unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK; |
@@ -299,7 +298,8 @@ err_nopages: | |||
299 | return NULL; | 298 | return NULL; |
300 | } | 299 | } |
301 | 300 | ||
302 | void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba) | 301 | static void sbus_free_coherent(struct device *dev, size_t n, void *p, |
302 | dma_addr_t ba) | ||
303 | { | 303 | { |
304 | struct resource *res; | 304 | struct resource *res; |
305 | struct page *pgv; | 305 | struct page *pgv; |
@@ -317,7 +317,7 @@ void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba) | |||
317 | 317 | ||
318 | n = (n + PAGE_SIZE-1) & PAGE_MASK; | 318 | n = (n + PAGE_SIZE-1) & PAGE_MASK; |
319 | if ((res->end-res->start)+1 != n) { | 319 | if ((res->end-res->start)+1 != n) { |
320 | printk("sbus_free_consistent: region 0x%lx asked 0x%lx\n", | 320 | printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n", |
321 | (long)((res->end-res->start)+1), n); | 321 | (long)((res->end-res->start)+1), n); |
322 | return; | 322 | return; |
323 | } | 323 | } |
@@ -337,8 +337,10 @@ void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba) | |||
337 | * CPU view of this memory may be inconsistent with | 337 | * CPU view of this memory may be inconsistent with |
338 | * a device view and explicit flushing is necessary. | 338 | * a device view and explicit flushing is necessary. |
339 | */ | 339 | */ |
340 | dma_addr_t sbus_map_page(struct device *dev, struct page *page, | 340 | static dma_addr_t sbus_map_page(struct device *dev, struct page *page, |
341 | unsigned long offset, size_t len, int direction) | 341 | unsigned long offset, size_t len, |
342 | enum dma_data_direction dir, | ||
343 | struct dma_attrs *attrs) | ||
342 | { | 344 | { |
343 | void *va = page_address(page) + offset; | 345 | void *va = page_address(page) + offset; |
344 | 346 | ||
@@ -353,12 +355,14 @@ dma_addr_t sbus_map_page(struct device *dev, struct page *page, | |||
353 | return mmu_get_scsi_one(dev, va, len); | 355 | return mmu_get_scsi_one(dev, va, len); |
354 | } | 356 | } |
355 | 357 | ||
356 | void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n, int direction) | 358 | static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n, |
359 | enum dma_data_direction dir, struct dma_attrs *attrs) | ||
357 | { | 360 | { |
358 | mmu_release_scsi_one(dev, ba, n); | 361 | mmu_release_scsi_one(dev, ba, n); |
359 | } | 362 | } |
360 | 363 | ||
361 | int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, int direction) | 364 | static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, |
365 | enum dma_data_direction dir, struct dma_attrs *attrs) | ||
362 | { | 366 | { |
363 | mmu_get_scsi_sgl(dev, sg, n); | 367 | mmu_get_scsi_sgl(dev, sg, n); |
364 | 368 | ||
@@ -369,19 +373,38 @@ int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, int direction | |||
369 | return n; | 373 | return n; |
370 | } | 374 | } |
371 | 375 | ||
372 | void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n, int direction) | 376 | static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n, |
377 | enum dma_data_direction dir, struct dma_attrs *attrs) | ||
373 | { | 378 | { |
374 | mmu_release_scsi_sgl(dev, sg, n); | 379 | mmu_release_scsi_sgl(dev, sg, n); |
375 | } | 380 | } |
376 | 381 | ||
377 | void sbus_dma_sync_single_for_cpu(struct device *dev, dma_addr_t ba, size_t size, int direction) | 382 | static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
383 | int n, enum dma_data_direction dir) | ||
378 | { | 384 | { |
385 | BUG(); | ||
379 | } | 386 | } |
380 | 387 | ||
381 | void sbus_dma_sync_single_for_device(struct device *dev, dma_addr_t ba, size_t size, int direction) | 388 | static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg, |
389 | int n, enum dma_data_direction dir) | ||
382 | { | 390 | { |
391 | BUG(); | ||
383 | } | 392 | } |
384 | 393 | ||
394 | struct dma_map_ops sbus_dma_ops = { | ||
395 | .alloc_coherent = sbus_alloc_coherent, | ||
396 | .free_coherent = sbus_free_coherent, | ||
397 | .map_page = sbus_map_page, | ||
398 | .unmap_page = sbus_unmap_page, | ||
399 | .map_sg = sbus_map_sg, | ||
400 | .unmap_sg = sbus_unmap_sg, | ||
401 | .sync_sg_for_cpu = sbus_sync_sg_for_cpu, | ||
402 | .sync_sg_for_device = sbus_sync_sg_for_device, | ||
403 | }; | ||
404 | |||
405 | struct dma_map_ops *dma_ops = &sbus_dma_ops; | ||
406 | EXPORT_SYMBOL(dma_ops); | ||
407 | |||
385 | static int __init sparc_register_ioport(void) | 408 | static int __init sparc_register_ioport(void) |
386 | { | 409 | { |
387 | register_proc_sparc_ioport(); | 410 | register_proc_sparc_ioport(); |
@@ -398,7 +421,8 @@ arch_initcall(sparc_register_ioport); | |||
398 | /* Allocate and map kernel buffer using consistent mode DMA for a device. | 421 | /* Allocate and map kernel buffer using consistent mode DMA for a device. |
399 | * hwdev should be valid struct pci_dev pointer for PCI devices. | 422 | * hwdev should be valid struct pci_dev pointer for PCI devices. |
400 | */ | 423 | */ |
401 | void *pci_alloc_consistent(struct pci_dev *pdev, size_t len, dma_addr_t *pba) | 424 | static void *pci32_alloc_coherent(struct device *dev, size_t len, |
425 | dma_addr_t *pba, gfp_t gfp) | ||
402 | { | 426 | { |
403 | unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK; | 427 | unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK; |
404 | unsigned long va; | 428 | unsigned long va; |
@@ -442,7 +466,6 @@ void *pci_alloc_consistent(struct pci_dev *pdev, size_t len, dma_addr_t *pba) | |||
442 | *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */ | 466 | *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */ |
443 | return (void *) res->start; | 467 | return (void *) res->start; |
444 | } | 468 | } |
445 | EXPORT_SYMBOL(pci_alloc_consistent); | ||
446 | 469 | ||
447 | /* Free and unmap a consistent DMA buffer. | 470 | /* Free and unmap a consistent DMA buffer. |
448 | * cpu_addr is what was returned from pci_alloc_consistent, | 471 | * cpu_addr is what was returned from pci_alloc_consistent, |
@@ -452,7 +475,8 @@ EXPORT_SYMBOL(pci_alloc_consistent); | |||
452 | * References to the memory and mappings associated with cpu_addr/dma_addr | 475 | * References to the memory and mappings associated with cpu_addr/dma_addr |
453 | * past this call are illegal. | 476 | * past this call are illegal. |
454 | */ | 477 | */ |
455 | void pci_free_consistent(struct pci_dev *pdev, size_t n, void *p, dma_addr_t ba) | 478 | static void pci32_free_coherent(struct device *dev, size_t n, void *p, |
479 | dma_addr_t ba) | ||
456 | { | 480 | { |
457 | struct resource *res; | 481 | struct resource *res; |
458 | unsigned long pgp; | 482 | unsigned long pgp; |
@@ -484,60 +508,18 @@ void pci_free_consistent(struct pci_dev *pdev, size_t n, void *p, dma_addr_t ba) | |||
484 | 508 | ||
485 | free_pages(pgp, get_order(n)); | 509 | free_pages(pgp, get_order(n)); |
486 | } | 510 | } |
487 | EXPORT_SYMBOL(pci_free_consistent); | ||
488 | |||
489 | /* Map a single buffer of the indicated size for DMA in streaming mode. | ||
490 | * The 32-bit bus address to use is returned. | ||
491 | * | ||
492 | * Once the device is given the dma address, the device owns this memory | ||
493 | * until either pci_unmap_single or pci_dma_sync_single_* is performed. | ||
494 | */ | ||
495 | dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, | ||
496 | int direction) | ||
497 | { | ||
498 | BUG_ON(direction == PCI_DMA_NONE); | ||
499 | /* IIep is write-through, not flushing. */ | ||
500 | return virt_to_phys(ptr); | ||
501 | } | ||
502 | EXPORT_SYMBOL(pci_map_single); | ||
503 | |||
504 | /* Unmap a single streaming mode DMA translation. The dma_addr and size | ||
505 | * must match what was provided for in a previous pci_map_single call. All | ||
506 | * other usages are undefined. | ||
507 | * | ||
508 | * After this call, reads by the cpu to the buffer are guaranteed to see | ||
509 | * whatever the device wrote there. | ||
510 | */ | ||
511 | void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t ba, size_t size, | ||
512 | int direction) | ||
513 | { | ||
514 | BUG_ON(direction == PCI_DMA_NONE); | ||
515 | if (direction != PCI_DMA_TODEVICE) { | ||
516 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), | ||
517 | (size + PAGE_SIZE-1) & PAGE_MASK); | ||
518 | } | ||
519 | } | ||
520 | EXPORT_SYMBOL(pci_unmap_single); | ||
521 | 511 | ||
522 | /* | 512 | /* |
523 | * Same as pci_map_single, but with pages. | 513 | * Same as pci_map_single, but with pages. |
524 | */ | 514 | */ |
525 | dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page, | 515 | static dma_addr_t pci32_map_page(struct device *dev, struct page *page, |
526 | unsigned long offset, size_t size, int direction) | 516 | unsigned long offset, size_t size, |
517 | enum dma_data_direction dir, | ||
518 | struct dma_attrs *attrs) | ||
527 | { | 519 | { |
528 | BUG_ON(direction == PCI_DMA_NONE); | ||
529 | /* IIep is write-through, not flushing. */ | 520 | /* IIep is write-through, not flushing. */ |
530 | return page_to_phys(page) + offset; | 521 | return page_to_phys(page) + offset; |
531 | } | 522 | } |
532 | EXPORT_SYMBOL(pci_map_page); | ||
533 | |||
534 | void pci_unmap_page(struct pci_dev *hwdev, | ||
535 | dma_addr_t dma_address, size_t size, int direction) | ||
536 | { | ||
537 | BUG_ON(direction == PCI_DMA_NONE); | ||
538 | /* mmu_inval_dma_area XXX */ | ||
539 | } | ||
540 | EXPORT_SYMBOL(pci_unmap_page); | ||
541 | 523 | ||
542 | /* Map a set of buffers described by scatterlist in streaming | 524 | /* Map a set of buffers described by scatterlist in streaming |
543 | * mode for DMA. This is the scather-gather version of the | 525 | * mode for DMA. This is the scather-gather version of the |
@@ -554,13 +536,13 @@ EXPORT_SYMBOL(pci_unmap_page); | |||
554 | * Device ownership issues as mentioned above for pci_map_single are | 536 | * Device ownership issues as mentioned above for pci_map_single are |
555 | * the same here. | 537 | * the same here. |
556 | */ | 538 | */ |
557 | int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, | 539 | static int pci32_map_sg(struct device *device, struct scatterlist *sgl, |
558 | int direction) | 540 | int nents, enum dma_data_direction dir, |
541 | struct dma_attrs *attrs) | ||
559 | { | 542 | { |
560 | struct scatterlist *sg; | 543 | struct scatterlist *sg; |
561 | int n; | 544 | int n; |
562 | 545 | ||
563 | BUG_ON(direction == PCI_DMA_NONE); | ||
564 | /* IIep is write-through, not flushing. */ | 546 | /* IIep is write-through, not flushing. */ |
565 | for_each_sg(sgl, sg, nents, n) { | 547 | for_each_sg(sgl, sg, nents, n) { |
566 | BUG_ON(page_address(sg_page(sg)) == NULL); | 548 | BUG_ON(page_address(sg_page(sg)) == NULL); |
@@ -569,20 +551,19 @@ int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, | |||
569 | } | 551 | } |
570 | return nents; | 552 | return nents; |
571 | } | 553 | } |
572 | EXPORT_SYMBOL(pci_map_sg); | ||
573 | 554 | ||
574 | /* Unmap a set of streaming mode DMA translations. | 555 | /* Unmap a set of streaming mode DMA translations. |
575 | * Again, cpu read rules concerning calls here are the same as for | 556 | * Again, cpu read rules concerning calls here are the same as for |
576 | * pci_unmap_single() above. | 557 | * pci_unmap_single() above. |
577 | */ | 558 | */ |
578 | void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, | 559 | static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl, |
579 | int direction) | 560 | int nents, enum dma_data_direction dir, |
561 | struct dma_attrs *attrs) | ||
580 | { | 562 | { |
581 | struct scatterlist *sg; | 563 | struct scatterlist *sg; |
582 | int n; | 564 | int n; |
583 | 565 | ||
584 | BUG_ON(direction == PCI_DMA_NONE); | 566 | if (dir != PCI_DMA_TODEVICE) { |
585 | if (direction != PCI_DMA_TODEVICE) { | ||
586 | for_each_sg(sgl, sg, nents, n) { | 567 | for_each_sg(sgl, sg, nents, n) { |
587 | BUG_ON(page_address(sg_page(sg)) == NULL); | 568 | BUG_ON(page_address(sg_page(sg)) == NULL); |
588 | mmu_inval_dma_area( | 569 | mmu_inval_dma_area( |
@@ -591,7 +572,6 @@ void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, | |||
591 | } | 572 | } |
592 | } | 573 | } |
593 | } | 574 | } |
594 | EXPORT_SYMBOL(pci_unmap_sg); | ||
595 | 575 | ||
596 | /* Make physical memory consistent for a single | 576 | /* Make physical memory consistent for a single |
597 | * streaming mode DMA translation before or after a transfer. | 577 | * streaming mode DMA translation before or after a transfer. |
@@ -603,25 +583,23 @@ EXPORT_SYMBOL(pci_unmap_sg); | |||
603 | * must first perform a pci_dma_sync_for_device, and then the | 583 | * must first perform a pci_dma_sync_for_device, and then the |
604 | * device again owns the buffer. | 584 | * device again owns the buffer. |
605 | */ | 585 | */ |
606 | void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t ba, size_t size, int direction) | 586 | static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba, |
587 | size_t size, enum dma_data_direction dir) | ||
607 | { | 588 | { |
608 | BUG_ON(direction == PCI_DMA_NONE); | 589 | if (dir != PCI_DMA_TODEVICE) { |
609 | if (direction != PCI_DMA_TODEVICE) { | ||
610 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), | 590 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), |
611 | (size + PAGE_SIZE-1) & PAGE_MASK); | 591 | (size + PAGE_SIZE-1) & PAGE_MASK); |
612 | } | 592 | } |
613 | } | 593 | } |
614 | EXPORT_SYMBOL(pci_dma_sync_single_for_cpu); | ||
615 | 594 | ||
616 | void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t ba, size_t size, int direction) | 595 | static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba, |
596 | size_t size, enum dma_data_direction dir) | ||
617 | { | 597 | { |
618 | BUG_ON(direction == PCI_DMA_NONE); | 598 | if (dir != PCI_DMA_TODEVICE) { |
619 | if (direction != PCI_DMA_TODEVICE) { | ||
620 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), | 599 | mmu_inval_dma_area((unsigned long)phys_to_virt(ba), |
621 | (size + PAGE_SIZE-1) & PAGE_MASK); | 600 | (size + PAGE_SIZE-1) & PAGE_MASK); |
622 | } | 601 | } |
623 | } | 602 | } |
624 | EXPORT_SYMBOL(pci_dma_sync_single_for_device); | ||
625 | 603 | ||
626 | /* Make physical memory consistent for a set of streaming | 604 | /* Make physical memory consistent for a set of streaming |
627 | * mode DMA translations after a transfer. | 605 | * mode DMA translations after a transfer. |
@@ -629,13 +607,13 @@ EXPORT_SYMBOL(pci_dma_sync_single_for_device); | |||
629 | * The same as pci_dma_sync_single_* but for a scatter-gather list, | 607 | * The same as pci_dma_sync_single_* but for a scatter-gather list, |
630 | * same rules and usage. | 608 | * same rules and usage. |
631 | */ | 609 | */ |
632 | void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, int direction) | 610 | static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl, |
611 | int nents, enum dma_data_direction dir) | ||
633 | { | 612 | { |
634 | struct scatterlist *sg; | 613 | struct scatterlist *sg; |
635 | int n; | 614 | int n; |
636 | 615 | ||
637 | BUG_ON(direction == PCI_DMA_NONE); | 616 | if (dir != PCI_DMA_TODEVICE) { |
638 | if (direction != PCI_DMA_TODEVICE) { | ||
639 | for_each_sg(sgl, sg, nents, n) { | 617 | for_each_sg(sgl, sg, nents, n) { |
640 | BUG_ON(page_address(sg_page(sg)) == NULL); | 618 | BUG_ON(page_address(sg_page(sg)) == NULL); |
641 | mmu_inval_dma_area( | 619 | mmu_inval_dma_area( |
@@ -644,15 +622,14 @@ void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sgl, int | |||
644 | } | 622 | } |
645 | } | 623 | } |
646 | } | 624 | } |
647 | EXPORT_SYMBOL(pci_dma_sync_sg_for_cpu); | ||
648 | 625 | ||
649 | void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, int direction) | 626 | static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl, |
627 | int nents, enum dma_data_direction dir) | ||
650 | { | 628 | { |
651 | struct scatterlist *sg; | 629 | struct scatterlist *sg; |
652 | int n; | 630 | int n; |
653 | 631 | ||
654 | BUG_ON(direction == PCI_DMA_NONE); | 632 | if (dir != PCI_DMA_TODEVICE) { |
655 | if (direction != PCI_DMA_TODEVICE) { | ||
656 | for_each_sg(sgl, sg, nents, n) { | 633 | for_each_sg(sgl, sg, nents, n) { |
657 | BUG_ON(page_address(sg_page(sg)) == NULL); | 634 | BUG_ON(page_address(sg_page(sg)) == NULL); |
658 | mmu_inval_dma_area( | 635 | mmu_inval_dma_area( |
@@ -661,7 +638,20 @@ void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sgl, | |||
661 | } | 638 | } |
662 | } | 639 | } |
663 | } | 640 | } |
664 | EXPORT_SYMBOL(pci_dma_sync_sg_for_device); | 641 | |
642 | struct dma_map_ops pci32_dma_ops = { | ||
643 | .alloc_coherent = pci32_alloc_coherent, | ||
644 | .free_coherent = pci32_free_coherent, | ||
645 | .map_page = pci32_map_page, | ||
646 | .map_sg = pci32_map_sg, | ||
647 | .unmap_sg = pci32_unmap_sg, | ||
648 | .sync_single_for_cpu = pci32_sync_single_for_cpu, | ||
649 | .sync_single_for_device = pci32_sync_single_for_device, | ||
650 | .sync_sg_for_cpu = pci32_sync_sg_for_cpu, | ||
651 | .sync_sg_for_device = pci32_sync_sg_for_device, | ||
652 | }; | ||
653 | EXPORT_SYMBOL(pci32_dma_ops); | ||
654 | |||
665 | #endif /* CONFIG_PCI */ | 655 | #endif /* CONFIG_PCI */ |
666 | 656 | ||
667 | #ifdef CONFIG_PROC_FS | 657 | #ifdef CONFIG_PROC_FS |