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authorDavid S. Miller <davem@davemloft.net>2010-03-03 11:08:49 -0500
committerDavid S. Miller <davem@davemloft.net>2010-03-03 11:08:49 -0500
commitc7d5a0050773e98d1094eaa9f2a1a793fafac300 (patch)
tree9836ff13aabf0990d5f235f24c90b5ef5cd8ae71 /arch/sparc/include
parent6c5ae5b278e29c1a23fd562e1a5276c2e2ea1738 (diff)
sparc64: Kill off old sys_perfctr system call and state.
People should be using the perf events interfaces, and the way these system call facilities used the %pcr conflicts with the usage of the NMI watchdog and perf events. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/include')
-rw-r--r--arch/sparc/include/asm/perfctr.h4
-rw-r--r--arch/sparc/include/asm/system_64.h15
-rw-r--r--arch/sparc/include/asm/thread_info_64.h25
3 files changed, 10 insertions, 34 deletions
diff --git a/arch/sparc/include/asm/perfctr.h b/arch/sparc/include/asm/perfctr.h
index 836873002b75..8d8720a8770d 100644
--- a/arch/sparc/include/asm/perfctr.h
+++ b/arch/sparc/include/asm/perfctr.h
@@ -10,8 +10,8 @@
10 * from enumeration below. The meaning of further arguments 10 * from enumeration below. The meaning of further arguments
11 * are determined by the operation code. 11 * are determined by the operation code.
12 * 12 *
13 * int sys_perfctr(int opcode, unsigned long arg0, 13 * NOTE: This system call is no longer provided, use the perf_events
14 * unsigned long arg1, unsigned long arg2) 14 * infrastructure.
15 * 15 *
16 * Pointers which are passed by the user are pointers to 64-bit 16 * Pointers which are passed by the user are pointers to 64-bit
17 * integers. 17 * integers.
diff --git a/arch/sparc/include/asm/system_64.h b/arch/sparc/include/asm/system_64.h
index d47a98e66972..d24cfe16afc1 100644
--- a/arch/sparc/include/asm/system_64.h
+++ b/arch/sparc/include/asm/system_64.h
@@ -143,15 +143,7 @@ do { \
143 * and 2 stores in this critical code path. -DaveM 143 * and 2 stores in this critical code path. -DaveM
144 */ 144 */
145#define switch_to(prev, next, last) \ 145#define switch_to(prev, next, last) \
146do { if (test_thread_flag(TIF_PERFCTR)) { \ 146do { flush_tlb_pending(); \
147 unsigned long __tmp; \
148 read_pcr(__tmp); \
149 current_thread_info()->pcr_reg = __tmp; \
150 read_pic(__tmp); \
151 current_thread_info()->kernel_cntd0 += (unsigned int)(__tmp);\
152 current_thread_info()->kernel_cntd1 += ((__tmp) >> 32); \
153 } \
154 flush_tlb_pending(); \
155 save_and_clear_fpu(); \ 147 save_and_clear_fpu(); \
156 /* If you are tempted to conditionalize the following */ \ 148 /* If you are tempted to conditionalize the following */ \
157 /* so that ASI is only written if it changes, think again. */ \ 149 /* so that ASI is only written if it changes, think again. */ \
@@ -197,11 +189,6 @@ do { if (test_thread_flag(TIF_PERFCTR)) { \
197 "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ 189 "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
198 "i0", "i1", "i2", "i3", "i4", "i5", \ 190 "i0", "i1", "i2", "i3", "i4", "i5", \
199 "o0", "o1", "o2", "o3", "o4", "o5", "o7"); \ 191 "o0", "o1", "o2", "o3", "o4", "o5", "o7"); \
200 /* If you fuck with this, update ret_from_syscall code too. */ \
201 if (test_thread_flag(TIF_PERFCTR)) { \
202 write_pcr(current_thread_info()->pcr_reg); \
203 reset_pic(); \
204 } \
205} while(0) 192} while(0)
206 193
207static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val) 194static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val)
diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h
index 39be9f256e5a..9e2d9447f2ad 100644
--- a/arch/sparc/include/asm/thread_info_64.h
+++ b/arch/sparc/include/asm/thread_info_64.h
@@ -58,11 +58,6 @@ struct thread_info {
58 unsigned long gsr[7]; 58 unsigned long gsr[7];
59 unsigned long xfsr[7]; 59 unsigned long xfsr[7];
60 60
61 __u64 __user *user_cntd0;
62 __u64 __user *user_cntd1;
63 __u64 kernel_cntd0, kernel_cntd1;
64 __u64 pcr_reg;
65
66 struct restart_block restart_block; 61 struct restart_block restart_block;
67 62
68 struct pt_regs *kern_una_regs; 63 struct pt_regs *kern_una_regs;
@@ -96,15 +91,10 @@ struct thread_info {
96#define TI_RWIN_SPTRS 0x000003c8 91#define TI_RWIN_SPTRS 0x000003c8
97#define TI_GSR 0x00000400 92#define TI_GSR 0x00000400
98#define TI_XFSR 0x00000438 93#define TI_XFSR 0x00000438
99#define TI_USER_CNTD0 0x00000470 94#define TI_RESTART_BLOCK 0x00000470
100#define TI_USER_CNTD1 0x00000478 95#define TI_KUNA_REGS 0x000004a0
101#define TI_KERN_CNTD0 0x00000480 96#define TI_KUNA_INSN 0x000004a8
102#define TI_KERN_CNTD1 0x00000488 97#define TI_FPREGS 0x000004c0
103#define TI_PCR 0x00000490
104#define TI_RESTART_BLOCK 0x00000498
105#define TI_KUNA_REGS 0x000004c8
106#define TI_KUNA_INSN 0x000004d0
107#define TI_FPREGS 0x00000500
108 98
109/* We embed this in the uppermost byte of thread_info->flags */ 99/* We embed this in the uppermost byte of thread_info->flags */
110#define FAULT_CODE_WRITE 0x01 /* Write access, implies D-TLB */ 100#define FAULT_CODE_WRITE 0x01 /* Write access, implies D-TLB */
@@ -199,7 +189,7 @@ register struct thread_info *current_thread_info_reg asm("g6");
199 * 189 *
200 * On trap return we need to test several values: 190 * On trap return we need to test several values:
201 * 191 *
202 * user: need_resched, notify_resume, sigpending, wsaved, perfctr 192 * user: need_resched, notify_resume, sigpending, wsaved
203 * kernel: fpdepth 193 * kernel: fpdepth
204 * 194 *
205 * So to check for work in the kernel case we simply load the fpdepth 195 * So to check for work in the kernel case we simply load the fpdepth
@@ -220,7 +210,7 @@ register struct thread_info *current_thread_info_reg asm("g6");
220#define TIF_NOTIFY_RESUME 1 /* callback before returning to user */ 210#define TIF_NOTIFY_RESUME 1 /* callback before returning to user */
221#define TIF_SIGPENDING 2 /* signal pending */ 211#define TIF_SIGPENDING 2 /* signal pending */
222#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ 212#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
223#define TIF_PERFCTR 4 /* performance counters active */ 213/* flag bit 4 is available */
224#define TIF_UNALIGNED 5 /* allowed to do unaligned accesses */ 214#define TIF_UNALIGNED 5 /* allowed to do unaligned accesses */
225/* flag bit 6 is available */ 215/* flag bit 6 is available */
226#define TIF_32BIT 7 /* 32-bit binary */ 216#define TIF_32BIT 7 /* 32-bit binary */
@@ -241,7 +231,6 @@ register struct thread_info *current_thread_info_reg asm("g6");
241#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 231#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
242#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 232#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
243#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 233#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
244#define _TIF_PERFCTR (1<<TIF_PERFCTR)
245#define _TIF_UNALIGNED (1<<TIF_UNALIGNED) 234#define _TIF_UNALIGNED (1<<TIF_UNALIGNED)
246#define _TIF_32BIT (1<<TIF_32BIT) 235#define _TIF_32BIT (1<<TIF_32BIT)
247#define _TIF_SECCOMP (1<<TIF_SECCOMP) 236#define _TIF_SECCOMP (1<<TIF_SECCOMP)
@@ -252,7 +241,7 @@ register struct thread_info *current_thread_info_reg asm("g6");
252 241
253#define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \ 242#define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \
254 _TIF_DO_NOTIFY_RESUME_MASK | \ 243 _TIF_DO_NOTIFY_RESUME_MASK | \
255 _TIF_NEED_RESCHED | _TIF_PERFCTR) 244 _TIF_NEED_RESCHED)
256#define _TIF_DO_NOTIFY_RESUME_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING) 245#define _TIF_DO_NOTIFY_RESUME_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING)
257 246
258/* 247/*