diff options
author | FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> | 2009-08-09 22:53:16 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-08-10 03:35:00 -0400 |
commit | ee664a9252d24ef10317d1bba8fc8f4c6495b36c (patch) | |
tree | 5a9d50253ff11584251439b2931e95042e9631c2 /arch/sparc/include/asm | |
parent | c2c07dbd8742a26ab3f1ee8b82237a060a0d9f61 (diff) |
sparc: Use asm-generic/pci-dma-compat
This converts SPARC to use asm-generic/pci-dma-compat instead
of the homegrown mechnism.
SPARC32 has two dma_map_ops structures for pci and sbus
(removing arch/sparc/kernel/dma.c, PCI and SBUS DMA accessor).
The global 'dma_ops' is set to sbus_dma_ops and get_dma_ops()
returns pci32_dma_ops for pci devices so we can use the
appropriate dma mapping operations.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Tested-by: Robert Reif <reif@earthlink.net>
Acked-by: David S. Miller <davem@davemloft.net>
Cc: tony.luck@intel.com
Cc: fenghua.yu@intel.com
LKML-Reference: <1249872797-1314-8-git-send-email-fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/sparc/include/asm')
-rw-r--r-- | arch/sparc/include/asm/dma-mapping.h | 7 | ||||
-rw-r--r-- | arch/sparc/include/asm/pci.h | 3 | ||||
-rw-r--r-- | arch/sparc/include/asm/pci_32.h | 105 | ||||
-rw-r--r-- | arch/sparc/include/asm/pci_64.h | 88 |
4 files changed, 9 insertions, 194 deletions
diff --git a/arch/sparc/include/asm/dma-mapping.h b/arch/sparc/include/asm/dma-mapping.h index 34c92264208a..2677818dc781 100644 --- a/arch/sparc/include/asm/dma-mapping.h +++ b/arch/sparc/include/asm/dma-mapping.h | |||
@@ -14,10 +14,15 @@ extern int dma_set_mask(struct device *dev, u64 dma_mask); | |||
14 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) | 14 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) |
15 | #define dma_is_consistent(d, h) (1) | 15 | #define dma_is_consistent(d, h) (1) |
16 | 16 | ||
17 | extern struct dma_map_ops *dma_ops; | 17 | extern struct dma_map_ops *dma_ops, pci32_dma_ops; |
18 | extern struct bus_type pci_bus_type; | ||
18 | 19 | ||
19 | static inline struct dma_map_ops *get_dma_ops(struct device *dev) | 20 | static inline struct dma_map_ops *get_dma_ops(struct device *dev) |
20 | { | 21 | { |
22 | #if defined(CONFIG_SPARC32) && defined(CONFIG_PCI) | ||
23 | if (dev->bus == &pci_bus_type) | ||
24 | return &pci32_dma_ops; | ||
25 | #endif | ||
21 | return dma_ops; | 26 | return dma_ops; |
22 | } | 27 | } |
23 | 28 | ||
diff --git a/arch/sparc/include/asm/pci.h b/arch/sparc/include/asm/pci.h index 6e14fd179335..d9c031f9910f 100644 --- a/arch/sparc/include/asm/pci.h +++ b/arch/sparc/include/asm/pci.h | |||
@@ -5,4 +5,7 @@ | |||
5 | #else | 5 | #else |
6 | #include <asm/pci_32.h> | 6 | #include <asm/pci_32.h> |
7 | #endif | 7 | #endif |
8 | |||
9 | #include <asm-generic/pci-dma-compat.h> | ||
10 | |||
8 | #endif | 11 | #endif |
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h index b41c4c198159..ac0e8369fd97 100644 --- a/arch/sparc/include/asm/pci_32.h +++ b/arch/sparc/include/asm/pci_32.h | |||
@@ -31,42 +31,8 @@ static inline void pcibios_penalize_isa_irq(int irq, int active) | |||
31 | */ | 31 | */ |
32 | #define PCI_DMA_BUS_IS_PHYS (0) | 32 | #define PCI_DMA_BUS_IS_PHYS (0) |
33 | 33 | ||
34 | #include <asm/scatterlist.h> | ||
35 | |||
36 | struct pci_dev; | 34 | struct pci_dev; |
37 | 35 | ||
38 | /* Allocate and map kernel buffer using consistent mode DMA for a device. | ||
39 | * hwdev should be valid struct pci_dev pointer for PCI devices. | ||
40 | */ | ||
41 | extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle); | ||
42 | |||
43 | /* Free and unmap a consistent DMA buffer. | ||
44 | * cpu_addr is what was returned from pci_alloc_consistent, | ||
45 | * size must be the same as what as passed into pci_alloc_consistent, | ||
46 | * and likewise dma_addr must be the same as what *dma_addrp was set to. | ||
47 | * | ||
48 | * References to the memory and mappings assosciated with cpu_addr/dma_addr | ||
49 | * past this call are illegal. | ||
50 | */ | ||
51 | extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle); | ||
52 | |||
53 | /* Map a single buffer of the indicated size for DMA in streaming mode. | ||
54 | * The 32-bit bus address to use is returned. | ||
55 | * | ||
56 | * Once the device is given the dma address, the device owns this memory | ||
57 | * until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed. | ||
58 | */ | ||
59 | extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction); | ||
60 | |||
61 | /* Unmap a single streaming mode DMA translation. The dma_addr and size | ||
62 | * must match what was provided for in a previous pci_map_single call. All | ||
63 | * other usages are undefined. | ||
64 | * | ||
65 | * After this call, reads by the cpu to the buffer are guaranteed to see | ||
66 | * whatever the device wrote there. | ||
67 | */ | ||
68 | extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction); | ||
69 | |||
70 | /* pci_unmap_{single,page} is not a nop, thus... */ | 36 | /* pci_unmap_{single,page} is not a nop, thus... */ |
71 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ | 37 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ |
72 | dma_addr_t ADDR_NAME; | 38 | dma_addr_t ADDR_NAME; |
@@ -81,69 +47,6 @@ extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t | |||
81 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ | 47 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ |
82 | (((PTR)->LEN_NAME) = (VAL)) | 48 | (((PTR)->LEN_NAME) = (VAL)) |
83 | 49 | ||
84 | /* | ||
85 | * Same as above, only with pages instead of mapped addresses. | ||
86 | */ | ||
87 | extern dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page, | ||
88 | unsigned long offset, size_t size, int direction); | ||
89 | extern void pci_unmap_page(struct pci_dev *hwdev, | ||
90 | dma_addr_t dma_address, size_t size, int direction); | ||
91 | |||
92 | /* Map a set of buffers described by scatterlist in streaming | ||
93 | * mode for DMA. This is the scather-gather version of the | ||
94 | * above pci_map_single interface. Here the scatter gather list | ||
95 | * elements are each tagged with the appropriate dma address | ||
96 | * and length. They are obtained via sg_dma_{address,length}(SG). | ||
97 | * | ||
98 | * NOTE: An implementation may be able to use a smaller number of | ||
99 | * DMA address/length pairs than there are SG table elements. | ||
100 | * (for example via virtual mapping capabilities) | ||
101 | * The routine returns the number of addr/length pairs actually | ||
102 | * used, at most nents. | ||
103 | * | ||
104 | * Device ownership issues as mentioned above for pci_map_single are | ||
105 | * the same here. | ||
106 | */ | ||
107 | extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction); | ||
108 | |||
109 | /* Unmap a set of streaming mode DMA translations. | ||
110 | * Again, cpu read rules concerning calls here are the same as for | ||
111 | * pci_unmap_single() above. | ||
112 | */ | ||
113 | extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction); | ||
114 | |||
115 | /* Make physical memory consistent for a single | ||
116 | * streaming mode DMA translation after a transfer. | ||
117 | * | ||
118 | * If you perform a pci_map_single() but wish to interrogate the | ||
119 | * buffer using the cpu, yet do not wish to teardown the PCI dma | ||
120 | * mapping, you must call this function before doing so. At the | ||
121 | * next point you give the PCI dma address back to the card, you | ||
122 | * must first perform a pci_dma_sync_for_device, and then the device | ||
123 | * again owns the buffer. | ||
124 | */ | ||
125 | extern void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); | ||
126 | extern void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); | ||
127 | |||
128 | /* Make physical memory consistent for a set of streaming | ||
129 | * mode DMA translations after a transfer. | ||
130 | * | ||
131 | * The same as pci_dma_sync_single_* but for a scatter-gather list, | ||
132 | * same rules and usage. | ||
133 | */ | ||
134 | extern void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); | ||
135 | extern void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); | ||
136 | |||
137 | /* Return whether the given PCI device DMA address mask can | ||
138 | * be supported properly. For example, if your device can | ||
139 | * only drive the low 24-bits during PCI bus mastering, then | ||
140 | * you would pass 0x00ffffff as the mask to this function. | ||
141 | */ | ||
142 | static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) | ||
143 | { | ||
144 | return 1; | ||
145 | } | ||
146 | |||
147 | #ifdef CONFIG_PCI | 50 | #ifdef CONFIG_PCI |
148 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, | 51 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, |
149 | enum pci_dma_burst_strategy *strat, | 52 | enum pci_dma_burst_strategy *strat, |
@@ -154,14 +57,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, | |||
154 | } | 57 | } |
155 | #endif | 58 | #endif |
156 | 59 | ||
157 | #define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0) | ||
158 | |||
159 | static inline int pci_dma_mapping_error(struct pci_dev *pdev, | ||
160 | dma_addr_t dma_addr) | ||
161 | { | ||
162 | return (dma_addr == PCI_DMA_ERROR_CODE); | ||
163 | } | ||
164 | |||
165 | struct device_node; | 60 | struct device_node; |
166 | extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); | 61 | extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); |
167 | 62 | ||
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h index 7a1e3566e59c..5cc9f6aa5494 100644 --- a/arch/sparc/include/asm/pci_64.h +++ b/arch/sparc/include/asm/pci_64.h | |||
@@ -35,37 +35,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active) | |||
35 | */ | 35 | */ |
36 | #define PCI_DMA_BUS_IS_PHYS (0) | 36 | #define PCI_DMA_BUS_IS_PHYS (0) |
37 | 37 | ||
38 | static inline void *pci_alloc_consistent(struct pci_dev *pdev, size_t size, | ||
39 | dma_addr_t *dma_handle) | ||
40 | { | ||
41 | return dma_alloc_coherent(&pdev->dev, size, dma_handle, GFP_ATOMIC); | ||
42 | } | ||
43 | |||
44 | static inline void pci_free_consistent(struct pci_dev *pdev, size_t size, | ||
45 | void *vaddr, dma_addr_t dma_handle) | ||
46 | { | ||
47 | return dma_free_coherent(&pdev->dev, size, vaddr, dma_handle); | ||
48 | } | ||
49 | |||
50 | static inline dma_addr_t pci_map_single(struct pci_dev *pdev, void *ptr, | ||
51 | size_t size, int direction) | ||
52 | { | ||
53 | return dma_map_single(&pdev->dev, ptr, size, | ||
54 | (enum dma_data_direction) direction); | ||
55 | } | ||
56 | |||
57 | static inline void pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, | ||
58 | size_t size, int direction) | ||
59 | { | ||
60 | dma_unmap_single(&pdev->dev, dma_addr, size, | ||
61 | (enum dma_data_direction) direction); | ||
62 | } | ||
63 | |||
64 | #define pci_map_page(dev, page, off, size, dir) \ | ||
65 | pci_map_single(dev, (page_address(page) + (off)), size, dir) | ||
66 | #define pci_unmap_page(dev,addr,sz,dir) \ | ||
67 | pci_unmap_single(dev,addr,sz,dir) | ||
68 | |||
69 | /* pci_unmap_{single,page} is not a nop, thus... */ | 38 | /* pci_unmap_{single,page} is not a nop, thus... */ |
70 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ | 39 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ |
71 | dma_addr_t ADDR_NAME; | 40 | dma_addr_t ADDR_NAME; |
@@ -80,57 +49,6 @@ static inline void pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, | |||
80 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ | 49 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ |
81 | (((PTR)->LEN_NAME) = (VAL)) | 50 | (((PTR)->LEN_NAME) = (VAL)) |
82 | 51 | ||
83 | static inline int pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, | ||
84 | int nents, int direction) | ||
85 | { | ||
86 | return dma_map_sg(&pdev->dev, sg, nents, | ||
87 | (enum dma_data_direction) direction); | ||
88 | } | ||
89 | |||
90 | static inline void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, | ||
91 | int nents, int direction) | ||
92 | { | ||
93 | dma_unmap_sg(&pdev->dev, sg, nents, | ||
94 | (enum dma_data_direction) direction); | ||
95 | } | ||
96 | |||
97 | static inline void pci_dma_sync_single_for_cpu(struct pci_dev *pdev, | ||
98 | dma_addr_t dma_handle, | ||
99 | size_t size, int direction) | ||
100 | { | ||
101 | dma_sync_single_for_cpu(&pdev->dev, dma_handle, size, | ||
102 | (enum dma_data_direction) direction); | ||
103 | } | ||
104 | |||
105 | static inline void pci_dma_sync_single_for_device(struct pci_dev *pdev, | ||
106 | dma_addr_t dma_handle, | ||
107 | size_t size, int direction) | ||
108 | { | ||
109 | /* No flushing needed to sync cpu writes to the device. */ | ||
110 | } | ||
111 | |||
112 | static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *pdev, | ||
113 | struct scatterlist *sg, | ||
114 | int nents, int direction) | ||
115 | { | ||
116 | dma_sync_sg_for_cpu(&pdev->dev, sg, nents, | ||
117 | (enum dma_data_direction) direction); | ||
118 | } | ||
119 | |||
120 | static inline void pci_dma_sync_sg_for_device(struct pci_dev *pdev, | ||
121 | struct scatterlist *sg, | ||
122 | int nelems, int direction) | ||
123 | { | ||
124 | /* No flushing needed to sync cpu writes to the device. */ | ||
125 | } | ||
126 | |||
127 | /* Return whether the given PCI device DMA address mask can | ||
128 | * be supported properly. For example, if your device can | ||
129 | * only drive the low 24-bits during PCI bus mastering, then | ||
130 | * you would pass 0x00ffffff as the mask to this function. | ||
131 | */ | ||
132 | extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask); | ||
133 | |||
134 | /* PCI IOMMU mapping bypass support. */ | 52 | /* PCI IOMMU mapping bypass support. */ |
135 | 53 | ||
136 | /* PCI 64-bit addressing works for all slots on all controller | 54 | /* PCI 64-bit addressing works for all slots on all controller |
@@ -140,12 +58,6 @@ extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask); | |||
140 | #define PCI64_REQUIRED_MASK (~(dma64_addr_t)0) | 58 | #define PCI64_REQUIRED_MASK (~(dma64_addr_t)0) |
141 | #define PCI64_ADDR_BASE 0xfffc000000000000UL | 59 | #define PCI64_ADDR_BASE 0xfffc000000000000UL |
142 | 60 | ||
143 | static inline int pci_dma_mapping_error(struct pci_dev *pdev, | ||
144 | dma_addr_t dma_addr) | ||
145 | { | ||
146 | return dma_mapping_error(&pdev->dev, dma_addr); | ||
147 | } | ||
148 | |||
149 | #ifdef CONFIG_PCI | 61 | #ifdef CONFIG_PCI |
150 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, | 62 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, |
151 | enum pci_dma_burst_strategy *strat, | 63 | enum pci_dma_burst_strategy *strat, |