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| author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2009-12-14 13:23:03 -0500 |
|---|---|---|
| committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2009-12-14 13:23:03 -0500 |
| commit | 559300bc0ef7ccd541656f1189d38e7088389559 (patch) | |
| tree | cd1682881ca4246e9c5a1e8632be4bdd9d9706c6 /arch/sparc/include/asm/system_64.h | |
| parent | 5416bf33f92a4104dbcd6062bf377c8421ca3cfd (diff) | |
| parent | 22763c5cf3690a681551162c15d34d935308c8d7 (diff) | |
Merge commit 'v2.6.32'
Conflicts:
arch/avr32/mach-at32ap/include/mach/cpu.h
Diffstat (limited to 'arch/sparc/include/asm/system_64.h')
| -rw-r--r-- | arch/sparc/include/asm/system_64.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/system_64.h b/arch/sparc/include/asm/system_64.h index 25e848f0cad7..d47a98e66972 100644 --- a/arch/sparc/include/asm/system_64.h +++ b/arch/sparc/include/asm/system_64.h | |||
| @@ -63,6 +63,10 @@ do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \ | |||
| 63 | : : : "memory"); \ | 63 | : : : "memory"); \ |
| 64 | } while (0) | 64 | } while (0) |
| 65 | 65 | ||
| 66 | /* The kernel always executes in TSO memory model these days, | ||
| 67 | * and furthermore most sparc64 chips implement more stringent | ||
| 68 | * memory ordering than required by the specifications. | ||
| 69 | */ | ||
| 66 | #define mb() membar_safe("#StoreLoad") | 70 | #define mb() membar_safe("#StoreLoad") |
| 67 | #define rmb() __asm__ __volatile__("":::"memory") | 71 | #define rmb() __asm__ __volatile__("":::"memory") |
| 68 | #define wmb() __asm__ __volatile__("":::"memory") | 72 | #define wmb() __asm__ __volatile__("":::"memory") |