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authorPeter Zijlstra <peterz@infradead.org>2013-11-06 08:57:36 -0500
committerIngo Molnar <mingo@kernel.org>2014-01-12 04:37:15 -0500
commit93ea02bb84354370e51de803a9405f171f3edf88 (patch)
treedc7c7719fdfe0aed36eae3c2b374ced951e62a4c /arch/sh
parent1de7da377bd880ff23917f78924d0e908329d978 (diff)
arch: Clean up asm/barrier.h implementations using asm-generic/barrier.h
We're going to be adding a few new barrier primitives, and in order to avoid endless duplication make more agressive use of asm-generic/barrier.h. Change the asm-generic/barrier.h such that it allows partial barrier definitions and fills out the rest with defaults. There are a few architectures (m32r, m68k) that could probably do away with their barrier.h file entirely but are kept for now due to their unconventional nop() implementation. Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Michael Neuling <mikey@neuling.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Victor Kaplansky <VICTORK@il.ibm.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Link: http://lkml.kernel.org/r/20131213150640.846368594@infradead.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/include/asm/barrier.h21
1 files changed, 3 insertions, 18 deletions
diff --git a/arch/sh/include/asm/barrier.h b/arch/sh/include/asm/barrier.h
index 72c103dae300..43715308b068 100644
--- a/arch/sh/include/asm/barrier.h
+++ b/arch/sh/include/asm/barrier.h
@@ -26,29 +26,14 @@
26#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) 26#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
27#define mb() __asm__ __volatile__ ("synco": : :"memory") 27#define mb() __asm__ __volatile__ ("synco": : :"memory")
28#define rmb() mb() 28#define rmb() mb()
29#define wmb() __asm__ __volatile__ ("synco": : :"memory") 29#define wmb() mb()
30#define ctrl_barrier() __icbi(PAGE_OFFSET) 30#define ctrl_barrier() __icbi(PAGE_OFFSET)
31#define read_barrier_depends() do { } while(0)
32#else 31#else
33#define mb() __asm__ __volatile__ ("": : :"memory")
34#define rmb() mb()
35#define wmb() __asm__ __volatile__ ("": : :"memory")
36#define ctrl_barrier() __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop") 32#define ctrl_barrier() __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop")
37#define read_barrier_depends() do { } while(0)
38#endif
39
40#ifdef CONFIG_SMP
41#define smp_mb() mb()
42#define smp_rmb() rmb()
43#define smp_wmb() wmb()
44#define smp_read_barrier_depends() read_barrier_depends()
45#else
46#define smp_mb() barrier()
47#define smp_rmb() barrier()
48#define smp_wmb() barrier()
49#define smp_read_barrier_depends() do { } while(0)
50#endif 33#endif
51 34
52#define set_mb(var, value) do { (void)xchg(&var, value); } while (0) 35#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
53 36
37#include <asm-generic/barrier.h>
38
54#endif /* __ASM_SH_BARRIER_H */ 39#endif /* __ASM_SH_BARRIER_H */