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authorPaul Mundt <lethal@linux-sh.org>2012-06-14 01:46:36 -0400
committerPaul Mundt <lethal@linux-sh.org>2012-06-14 01:46:36 -0400
commit0375a73c6f1be69d5a9b439a7e95b92e54b3c09b (patch)
tree8b8c000fb330770940ab84dee8bf1487b75830a7 /arch/sh
parent5f857bce21cfd0531dc7d4daac74d976caf6166b (diff)
sh64: Attempt to make reserved insn trap handler resemble C.
This has been long overdue. No functional changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/kernel/traps_64.c386
1 files changed, 195 insertions, 191 deletions
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index 75bef61892d2..f87d20da1791 100644
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -32,195 +32,6 @@
32#include <asm/pgtable.h> 32#include <asm/pgtable.h>
33#include <asm/fpu.h> 33#include <asm/fpu.h>
34 34
35static void do_unhandled_exception(int trapnr, int signr, char *str, char *fn_name,
36 unsigned long error_code, struct pt_regs *regs, struct task_struct *tsk);
37
38#define DO_ERROR(trapnr, signr, str, name, tsk) \
39asmlinkage void do_##name(unsigned long error_code, struct pt_regs *regs) \
40{ \
41 do_unhandled_exception(trapnr, signr, str, __stringify(name), error_code, regs, current); \
42}
43
44DO_ERROR(13, SIGILL, "illegal slot instruction", illegal_slot_inst, current)
45DO_ERROR(87, SIGSEGV, "address error (exec)", address_error_exec, current)
46
47
48/* Implement misaligned load/store handling for kernel (and optionally for user
49 mode too). Limitation : only SHmedia mode code is handled - there is no
50 handling at all for misaligned accesses occurring in SHcompact code yet. */
51
52static int misaligned_fixup(struct pt_regs *regs);
53
54asmlinkage void do_address_error_load(unsigned long error_code, struct pt_regs *regs)
55{
56 if (misaligned_fixup(regs) < 0) {
57 do_unhandled_exception(7, SIGSEGV, "address error(load)",
58 "do_address_error_load",
59 error_code, regs, current);
60 }
61 return;
62}
63
64asmlinkage void do_address_error_store(unsigned long error_code, struct pt_regs *regs)
65{
66 if (misaligned_fixup(regs) < 0) {
67 do_unhandled_exception(8, SIGSEGV, "address error(store)",
68 "do_address_error_store",
69 error_code, regs, current);
70 }
71 return;
72}
73
74#if defined(CONFIG_SH64_ID2815_WORKAROUND)
75
76#define OPCODE_INVALID 0
77#define OPCODE_USER_VALID 1
78#define OPCODE_PRIV_VALID 2
79
80/* getcon/putcon - requires checking which control register is referenced. */
81#define OPCODE_CTRL_REG 3
82
83/* Table of valid opcodes for SHmedia mode.
84 Form a 10-bit value by concatenating the major/minor opcodes i.e.
85 opcode[31:26,20:16]. The 6 MSBs of this value index into the following
86 array. The 4 LSBs select the bit-pair in the entry (bits 1:0 correspond to
87 LSBs==4'b0000 etc). */
88static unsigned long shmedia_opcode_table[64] = {
89 0x55554044,0x54445055,0x15141514,0x14541414,0x00000000,0x10001000,0x01110055,0x04050015,
90 0x00000444,0xc0000000,0x44545515,0x40405555,0x55550015,0x10005555,0x55555505,0x04050000,
91 0x00000555,0x00000404,0x00040445,0x15151414,0x00000000,0x00000000,0x00000000,0x00000000,
92 0x00000055,0x40404444,0x00000404,0xc0009495,0x00000000,0x00000000,0x00000000,0x00000000,
93 0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
94 0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
95 0x80005050,0x04005055,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
96 0x81055554,0x00000404,0x55555555,0x55555555,0x00000000,0x00000000,0x00000000,0x00000000
97};
98
99void do_reserved_inst(unsigned long error_code, struct pt_regs *regs)
100{
101 /* Workaround SH5-101 cut2 silicon defect #2815 :
102 in some situations, inter-mode branches from SHcompact -> SHmedia
103 which should take ITLBMISS or EXECPROT exceptions at the target
104 falsely take RESINST at the target instead. */
105
106 unsigned long opcode = 0x6ff4fff0; /* guaranteed reserved opcode */
107 unsigned long pc, aligned_pc;
108 int get_user_error;
109 int trapnr = 12;
110 int signr = SIGILL;
111 char *exception_name = "reserved_instruction";
112
113 pc = regs->pc;
114 if ((pc & 3) == 1) {
115 /* SHmedia : check for defect. This requires executable vmas
116 to be readable too. */
117 aligned_pc = pc & ~3;
118 if (!access_ok(VERIFY_READ, aligned_pc, sizeof(unsigned long))) {
119 get_user_error = -EFAULT;
120 } else {
121 get_user_error = __get_user(opcode, (unsigned long *)aligned_pc);
122 }
123 if (get_user_error >= 0) {
124 unsigned long index, shift;
125 unsigned long major, minor, combined;
126 unsigned long reserved_field;
127 reserved_field = opcode & 0xf; /* These bits are currently reserved as zero in all valid opcodes */
128 major = (opcode >> 26) & 0x3f;
129 minor = (opcode >> 16) & 0xf;
130 combined = (major << 4) | minor;
131 index = major;
132 shift = minor << 1;
133 if (reserved_field == 0) {
134 int opcode_state = (shmedia_opcode_table[index] >> shift) & 0x3;
135 switch (opcode_state) {
136 case OPCODE_INVALID:
137 /* Trap. */
138 break;
139 case OPCODE_USER_VALID:
140 /* Restart the instruction : the branch to the instruction will now be from an RTE
141 not from SHcompact so the silicon defect won't be triggered. */
142 return;
143 case OPCODE_PRIV_VALID:
144 if (!user_mode(regs)) {
145 /* Should only ever get here if a module has
146 SHcompact code inside it. If so, the same fix up is needed. */
147 return; /* same reason */
148 }
149 /* Otherwise, user mode trying to execute a privileged instruction -
150 fall through to trap. */
151 break;
152 case OPCODE_CTRL_REG:
153 /* If in privileged mode, return as above. */
154 if (!user_mode(regs)) return;
155 /* In user mode ... */
156 if (combined == 0x9f) { /* GETCON */
157 unsigned long regno = (opcode >> 20) & 0x3f;
158 if (regno >= 62) {
159 return;
160 }
161 /* Otherwise, reserved or privileged control register, => trap */
162 } else if (combined == 0x1bf) { /* PUTCON */
163 unsigned long regno = (opcode >> 4) & 0x3f;
164 if (regno >= 62) {
165 return;
166 }
167 /* Otherwise, reserved or privileged control register, => trap */
168 } else {
169 /* Trap */
170 }
171 break;
172 default:
173 /* Fall through to trap. */
174 break;
175 }
176 }
177 /* fall through to normal resinst processing */
178 } else {
179 /* Error trying to read opcode. This typically means a
180 real fault, not a RESINST any more. So change the
181 codes. */
182 trapnr = 87;
183 exception_name = "address error (exec)";
184 signr = SIGSEGV;
185 }
186 }
187
188 do_unhandled_exception(trapnr, signr, exception_name, "do_reserved_inst", error_code, regs, current);
189}
190
191#else /* CONFIG_SH64_ID2815_WORKAROUND */
192
193/* If the workaround isn't needed, this is just a straightforward reserved
194 instruction */
195DO_ERROR(12, SIGILL, "reserved instruction", reserved_inst, current)
196
197#endif /* CONFIG_SH64_ID2815_WORKAROUND */
198
199/* Called with interrupts disabled */
200asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs)
201{
202 die_if_kernel("exception", regs, ex);
203}
204
205int do_unknown_trapa(unsigned long scId, struct pt_regs *regs)
206{
207 /* Syscall debug */
208 printk("System call ID error: [0x1#args:8 #syscall:16 0x%lx]\n", scId);
209
210 die_if_kernel("unknown trapa", regs, scId);
211
212 return -ENOSYS;
213}
214
215static void do_unhandled_exception(int trapnr, int signr, char *str, char *fn_name,
216 unsigned long error_code, struct pt_regs *regs, struct task_struct *tsk)
217{
218 if (user_mode(regs))
219 force_sig(signr, tsk);
220
221 die_if_no_fixup(str, regs, error_code);
222}
223
224static int read_opcode(reg_size_t pc, insn_size_t *result_opcode, int from_user_mode) 35static int read_opcode(reg_size_t pc, insn_size_t *result_opcode, int from_user_mode)
225{ 36{
226 int get_user_error; 37 int get_user_error;
@@ -784,7 +595,201 @@ static int misaligned_fixup(struct pt_regs *regs)
784 regs->pc += 4; /* Skip the instruction that's just been emulated */ 595 regs->pc += 4; /* Skip the instruction that's just been emulated */
785 return 0; 596 return 0;
786 } 597 }
598}
599
600static void do_unhandled_exception(int signr, char *str, unsigned long error,
601 struct pt_regs *regs)
602{
603 if (user_mode(regs))
604 force_sig(signr, current);
605
606 die_if_no_fixup(str, regs, error);
607}
608
609#define DO_ERROR(signr, str, name) \
610asmlinkage void do_##name(unsigned long error_code, struct pt_regs *regs) \
611{ \
612 do_unhandled_exception(signr, str, error_code, regs); \
613}
614
615DO_ERROR(SIGILL, "illegal slot instruction", illegal_slot_inst)
616DO_ERROR(SIGSEGV, "address error (exec)", address_error_exec)
617
618#if defined(CONFIG_SH64_ID2815_WORKAROUND)
619
620#define OPCODE_INVALID 0
621#define OPCODE_USER_VALID 1
622#define OPCODE_PRIV_VALID 2
623
624/* getcon/putcon - requires checking which control register is referenced. */
625#define OPCODE_CTRL_REG 3
626
627/* Table of valid opcodes for SHmedia mode.
628 Form a 10-bit value by concatenating the major/minor opcodes i.e.
629 opcode[31:26,20:16]. The 6 MSBs of this value index into the following
630 array. The 4 LSBs select the bit-pair in the entry (bits 1:0 correspond to
631 LSBs==4'b0000 etc). */
632static unsigned long shmedia_opcode_table[64] = {
633 0x55554044,0x54445055,0x15141514,0x14541414,0x00000000,0x10001000,0x01110055,0x04050015,
634 0x00000444,0xc0000000,0x44545515,0x40405555,0x55550015,0x10005555,0x55555505,0x04050000,
635 0x00000555,0x00000404,0x00040445,0x15151414,0x00000000,0x00000000,0x00000000,0x00000000,
636 0x00000055,0x40404444,0x00000404,0xc0009495,0x00000000,0x00000000,0x00000000,0x00000000,
637 0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
638 0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
639 0x80005050,0x04005055,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
640 0x81055554,0x00000404,0x55555555,0x55555555,0x00000000,0x00000000,0x00000000,0x00000000
641};
642
643/* Workaround SH5-101 cut2 silicon defect #2815 :
644 in some situations, inter-mode branches from SHcompact -> SHmedia
645 which should take ITLBMISS or EXECPROT exceptions at the target
646 falsely take RESINST at the target instead. */
647void do_reserved_inst(unsigned long error_code, struct pt_regs *regs)
648{
649 insn_size_t opcode = 0x6ff4fff0; /* guaranteed reserved opcode */
650 unsigned long pc, aligned_pc;
651 unsigned long index, shift;
652 unsigned long major, minor, combined;
653 unsigned long reserved_field;
654 int opcode_state;
655 int get_user_error;
656 int signr = SIGILL;
657 char *exception_name = "reserved_instruction";
658
659 pc = regs->pc;
660
661 /* SHcompact is not handled */
662 if (unlikely((pc & 3) == 0))
663 goto out;
664
665 /* SHmedia : check for defect. This requires executable vmas
666 to be readable too. */
667 aligned_pc = pc & ~3;
668 if (!access_ok(VERIFY_READ, aligned_pc, sizeof(insn_size_t)))
669 get_user_error = -EFAULT;
670 else
671 get_user_error = __get_user(opcode, (insn_size_t *)aligned_pc);
672
673 if (get_user_error < 0) {
674 /*
675 * Error trying to read opcode. This typically means a
676 * real fault, not a RESINST any more. So change the
677 * codes.
678 */
679 exception_name = "address error (exec)";
680 signr = SIGSEGV;
681 goto out;
682 }
683
684 /* These bits are currently reserved as zero in all valid opcodes */
685 reserved_field = opcode & 0xf;
686 if (unlikely(reserved_field))
687 goto out; /* invalid opcode */
688
689 major = (opcode >> 26) & 0x3f;
690 minor = (opcode >> 16) & 0xf;
691 combined = (major << 4) | minor;
692 index = major;
693 shift = minor << 1;
694 opcode_state = (shmedia_opcode_table[index] >> shift) & 0x3;
695 switch (opcode_state) {
696 case OPCODE_INVALID:
697 /* Trap. */
698 break;
699 case OPCODE_USER_VALID:
700 /*
701 * Restart the instruction: the branch to the instruction
702 * will now be from an RTE not from SHcompact so the
703 * silicon defect won't be triggered.
704 */
705 return;
706 case OPCODE_PRIV_VALID:
707 if (!user_mode(regs)) {
708 /*
709 * Should only ever get here if a module has
710 * SHcompact code inside it. If so, the same fix
711 * up is needed.
712 */
713 return; /* same reason */
714 }
715
716 /*
717 * Otherwise, user mode trying to execute a privileged
718 * instruction - fall through to trap.
719 */
720 break;
721 case OPCODE_CTRL_REG:
722 /* If in privileged mode, return as above. */
723 if (!user_mode(regs))
724 return;
725
726 /* In user mode ... */
727 if (combined == 0x9f) { /* GETCON */
728 unsigned long regno = (opcode >> 20) & 0x3f;
729
730 if (regno >= 62)
731 return;
732
733 /* reserved/privileged control register => trap */
734 } else if (combined == 0x1bf) { /* PUTCON */
735 unsigned long regno = (opcode >> 4) & 0x3f;
736
737 if (regno >= 62)
738 return;
739
740 /* reserved/privileged control register => trap */
741 }
742
743 break;
744 default:
745 /* Fall through to trap. */
746 break;
747 }
787 748
749out:
750 do_unhandled_exception(signr, exception_name, error_code, regs);
751}
752
753#else /* CONFIG_SH64_ID2815_WORKAROUND */
754
755/* If the workaround isn't needed, this is just a straightforward reserved
756 instruction */
757DO_ERROR(SIGILL, "reserved instruction", reserved_inst)
758
759#endif /* CONFIG_SH64_ID2815_WORKAROUND */
760
761/* Called with interrupts disabled */
762asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs)
763{
764 die_if_kernel("exception", regs, ex);
765}
766
767asmlinkage int do_unknown_trapa(unsigned long scId, struct pt_regs *regs)
768{
769 /* Syscall debug */
770 printk("System call ID error: [0x1#args:8 #syscall:16 0x%lx]\n", scId);
771
772 die_if_kernel("unknown trapa", regs, scId);
773
774 return -ENOSYS;
775}
776
777/* Implement misaligned load/store handling for kernel (and optionally for user
778 mode too). Limitation : only SHmedia mode code is handled - there is no
779 handling at all for misaligned accesses occurring in SHcompact code yet. */
780
781asmlinkage void do_address_error_load(unsigned long error_code, struct pt_regs *regs)
782{
783 if (misaligned_fixup(regs) < 0)
784 do_unhandled_exception(SIGSEGV, "address error(load)",
785 error_code, regs);
786}
787
788asmlinkage void do_address_error_store(unsigned long error_code, struct pt_regs *regs)
789{
790 if (misaligned_fixup(regs) < 0)
791 do_unhandled_exception(SIGSEGV, "address error(store)",
792 error_code, regs);
788} 793}
789 794
790asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs) 795asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
@@ -797,10 +802,9 @@ asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
797 of access we make to them - just go direct to their physical 802 of access we make to them - just go direct to their physical
798 addresses. */ 803 addresses. */
799 exp_cause = peek_real_address_q(DM_EXP_CAUSE_PHY); 804 exp_cause = peek_real_address_q(DM_EXP_CAUSE_PHY);
800 if (exp_cause & ~4) { 805 if (exp_cause & ~4)
801 printk("DM.EXP_CAUSE had unexpected bits set (=%08lx)\n", 806 printk("DM.EXP_CAUSE had unexpected bits set (=%08lx)\n",
802 (unsigned long)(exp_cause & 0xffffffff)); 807 (unsigned long)(exp_cause & 0xffffffff));
803 }
804 show_state(); 808 show_state();
805 /* Clear all DEBUGINT causes */ 809 /* Clear all DEBUGINT causes */
806 poke_real_address_q(DM_EXP_CAUSE_PHY, 0x0); 810 poke_real_address_q(DM_EXP_CAUSE_PHY, 0x0);
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