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authorPaul Mundt <lethal@linux-sh.org>2009-11-05 00:06:36 -0500
committerPaul Mundt <lethal@linux-sh.org>2009-11-05 00:06:36 -0500
commitd1b261ef85bf63383b80b46b7cee525e0a63b3d3 (patch)
tree23daf053464477774aad7248a40ed0ad70e7daa5 /arch/sh
parent2de339231b3b7c838542f646e5e699b3f033c43f (diff)
sh: Default-enable SPU clock for SH7724.
Wanted by the SPU2 UIO driver, which really ought to be handling this itself. Default enable it for now, until the driver gets a bit more intelligent. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index dfe9192be63e..9db743802f06 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -152,7 +152,7 @@ struct clk div6_clks[] = {
152 SH_CLK_DIV6("fsia_clk", &div3_clk, FCLKACR, 0), 152 SH_CLK_DIV6("fsia_clk", &div3_clk, FCLKACR, 0),
153 SH_CLK_DIV6("fsib_clk", &div3_clk, FCLKBCR, 0), 153 SH_CLK_DIV6("fsib_clk", &div3_clk, FCLKBCR, 0),
154 SH_CLK_DIV6("irda_clk", &div3_clk, IRDACLKCR, 0), 154 SH_CLK_DIV6("irda_clk", &div3_clk, IRDACLKCR, 0),
155 SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, 0), 155 SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
156}; 156};
157 157
158#define R_CLK (&r_clk) 158#define R_CLK (&r_clk)