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authorMatt Fleming <matt@console-pimps.org>2009-12-04 02:18:11 -0500
committerPaul Mundt <lethal@linux-sh.org>2009-12-04 02:18:11 -0500
commita781d1e5ff6277f80ff3c9503775521bc64cf131 (patch)
treece6c6222f86be3bd9bf409b9852a527fdf4b8a14 /arch/sh
parent7e01c949989b984c074469e04ab99c47367c7187 (diff)
sh: Drop associative writes for SH-4 cache flushes.
When flushing/invalidating the icache/dcache via the memory-mapped IC/OC address arrays, the associative bit should only be used in conjunction with virtual addresses. However, we currently flush cache lines based on physical address, so stop using the associative bit. It is a better strategy to use non-associative writes (and physical tags) for flushing the caches anyway, because flushing by virtual address (as with the A-bit set) requires a valid TLB entry for that virtual address. If one does not exist in the TLB no exception is generated and the flush is silently ignored. This is also future-proofing for SH-4A parts which are gradually phasing out associative writes to the cache array due to the aforementioned case of certain flushes silently turning in to nops. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/mm/cache-sh4.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 6bfd08d5fb81..f36a08bf3d5c 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -98,7 +98,7 @@ static inline void flush_cache_one(unsigned long start, unsigned long phys)
98 exec_offset = cached_to_uncached; 98 exec_offset = cached_to_uncached;
99 99
100 local_irq_save(flags); 100 local_irq_save(flags);
101 __flush_cache_one(start | SH_CACHE_ASSOC, phys, exec_offset); 101 __flush_cache_one(start, phys, exec_offset);
102 local_irq_restore(flags); 102 local_irq_restore(flags);
103} 103}
104 104
@@ -123,7 +123,7 @@ static void sh4_flush_dcache_page(void *arg)
123 123
124 /* Loop all the D-cache */ 124 /* Loop all the D-cache */
125 n = boot_cpu_data.dcache.n_aliases; 125 n = boot_cpu_data.dcache.n_aliases;
126 for (i = 0; i <= n; i++, addr += PAGE_SIZE) 126 for (i = 0; i < n; i++, addr += PAGE_SIZE)
127 flush_cache_one(addr, phys); 127 flush_cache_one(addr, phys);
128 } 128 }
129 129